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MC14028BFELG Arkusz danych(PDF) 1 Page - ON Semiconductor |
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MC14028BFELG Arkusz danych(HTML) 1 Page - ON Semiconductor |
1 / 7 page © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 6 1 Publication Order Number: MC14028B/D MC14028B BCD−To−Decimal Decoder Binary−To−Octal Decoder The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal (one−of−ten) decoded output, while a 3−bit binary input provides a decoded octal (one−of−eight) code output with D forced to a logic “0”. Expanded decoding such as binary−to−hexadecimal (one−of−sixteen), etc., can be achieved by using other MC14028B devices. The part is useful for code conversion, address decoding, memory selection control, demultiplexing, or readout decoding. Features • Diode Protection on All Inputs • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low−power TTL Loads or One Low−Power Schottky TTL Load Over the Rated Temperature Range • Positive Logic Design • Low Outputs on All Illegal Input Combinations • Similar to CD4028B • Pb−Free Packages are Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Parameter Symbol Value Unit DC Supply Voltage Range VDD − 0.5 to +18.0 V Input or Output Voltage Range (DC or Transient) Vin, Vout − 0.5 to VDD + 0.5 V Input or Output Current (DC or Transient) per Pin Iin, Iout ±10 mA Power Dissipation per Package (Note 1) PD 500 mW Ambient Temperature Range TA − 55 to +125 °C Storage Temperature Range Tstg − 65 to +150 °C Lead Temperature (8−Second Soldering) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb−Free Package MARKING DIAGRAMS PDIP−16 P SUFFIX CASE 648 SOIC−16 D SUFFIX CASE 751B 1 16 14028BG AWLYWW SOEIAJ−16 F SUFFIX CASE 966 1 16 MC14028B ALYWG 16 1 MC14028BCP AWLYYWWG 1 1 1 |
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