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ADL5330ACPZ-REEL7 Arkusz danych(PDF) 6 Page - Analog Devices

Numer części ADL5330ACPZ-REEL7
Szczegółowy opis  10 MHz to 3 GHz VGA with 60 dB Gain Control Range
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ADL5330ACPZ-REEL7 Arkusz danych(HTML) 6 Page - Analog Devices

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ADL5330
Rev. A | Page 6 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
18
17
16
15
1
2
3
14
13
VPS2
COM2
OPLO
OPHI
COM2
VPS2
4
5
6
VPS1
COM1
INLO
INHI
COM1
VPS1
ADL5330
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Descriptions
1, 6, 13, 18 to 22
VPS1, VPS2
Positive Supply. Nominally equal to 5 V.
2, 5, 10
COM1
Common for Input Stage.
3, 4
INHI, INLO
Differential Inputs, AC-Coupled.
7
VREF
Voltage Reference. Output at 1.5 V; normally ac-coupled to ground.
8
IPBS
Input Bias. Normally ac-coupled to ground.
9
OPBS
Output Bias. AC-Coupled to ground.
11
GNLO
Gain Control Common. Connect to ground.
12, 14, 17
COM2
Common for Output Stage.
15
OPLO
Low Side of Differential Output. Bias to VP with RF chokes.
16
OPHI
High Side of Differential Output. Bias to VP with RF chokes.
23
ENBL
Device Enable. Apply logic high for normal operation.
24
GAIN
Gain Control Voltage Input. Nominal range 0 V to 1.4 V.


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