Zakładka z wyszukiwarką danych komponentów |
|
AD8321 Arkusz danych(PDF) 11 Page - Analog Devices |
|
AD8321 Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 20 page AD8321 Distortion and DOCSIS Care must be taken when selecting attenuation levels specified in Table I as the output signal from the AD8321 must compen sate for the losses resulting from any added attenuation as well as the insertion losses associated with the diplexer. An increase in input signal becomes apparent at the upper end of the gain range and will be needed to achieve the 58 dBmV at the modem output. The insertion losses of the diplexer may vary, depend ing on the quality of the diplexer and whether the frequency of operation is in near proximity to the cut-off frequency of the low-pass filter. Figures 9 and 10 show the expected second and third harmonic distortion performance vs. fundamental frequency at various input power levels. These graphs indicate the worst harmonic levels exhibited over the entire output range of the AD8321 (i.e., –27 dB to +26 dB). Figures 9 and 10 are useful when it is necessary to determine inband harmonic levels (5 MHz to 42 MHz or 5 MHz to 65 MHz). Harmonics that are higher in frequency, as compared to the cutoff frequency of the low-pass filter of the diplexer, will be further suppressed by the stop band attenuation level of the LP filter in the diplexer. Designers must balance the need to improve noise performance by adding attenuation with the resulting need for increased signal amplitude while maintaining DOCSIS specified dis tortion performance. Evaluation Board Features and Operation The AD8321 evaluation board (p/n AD8321-EVAL) and com panion software program written in Microsoft Visual Basic are available through Analog Devices, Inc. and can be used to control the AD8321 Variable Gain Upstream Power Amplifier via the parallel port of a PC. This evaluation package provides a convenient way to program the gain/attenuation of the AD8321 without the addition of any external glue logic. AD8321-EVAL has been developed to facilitate the use of the AD8321 in an application targeted at DOCSIS compliance. A low cost Alpha Industries AS128-73 GaAs 2 Watt High Linearity SPDT RF switch (referred to as SWb) is included on the evaluation board (see Figure 28) along with accommodations for a user specified 75 W matching attenuator (See Table I for a table of resistor values of attenuators ranging from –1 dB to –4 dB). The AD8321 DATEN, CLK and SDATA digital lines are pro grammed according to the gain setting and mode of operation selected using the Windows ® interface of the control software (see Figure 30). The serial interface of the AD8321 is ad dressed through the parallel port of a PC using four or more bits (plus ground). Two additional bits from the parallel port are used to control the RF switch(s). This software programs the AD8321 gain or attenuation, incorporates asynchronous control of the power-down feature ( PD Pin 6) as well as asyn chronous control of the Alpha Industries RF switch(es) AS128 73. * A standard printer cable is used to feed the necessary data to the AD8321-EVAL board. These features allow the designer to fully develop and evaluate the upstream signal path begin ning at the input to the PA. Overshoot on PC Printer Ports The data lines on some PC parallel printer ports have excessive overshoot. Overshoot presented to the CLK pin (TP7 on the evaluation board) may cause communications problems. The evaluation board layout was designed to accommodate a series resistor and shunt capacitor (R6 and C12) if required to filter or condition the CLK data. Between Burst Transient Reduction In order to reduce the amplitude of the “Burst On/Off Tran sient” glitch at the output of the AD8321, when switching from forward transmit mode to reverse powered down mode, position the SWb switch in Figure 28 to position “a” before changing the logic applied to PD Pin 6 of the AD8321 from Logic 1-to-0 (and also 0-to-1). Use the “Enable Output Switch” feature in the evaluation board control software (see Figure 31) to select the appropriate position of the AS128-73 switch. A check in this box enables the switch to pass upstream data to the output of the evaluation board. The AS128-73 produces a glitch of approxi mately 5 mV p-p regardless of the AD8321 gain setting. The AD8321-EVAL board comes with resistors and capacitors installed on the logic lines controlling the RF switch (R8, R9, C16, C17). These values were selected to reduce the glitch amplitude to DOCSIS acceptable levels and may be modified if required. The SPDT function of the AS128-73 RF switch accommodates the need to maintain proper termination when the diplexer is disconnected from the output of the AD8321. The AD8321-EVAL board accommodates the needed back termination (refer to the Cb and Rb of the evaluation circuit). Differential Inputs When evaluating the AD8321 in differential input mode, termi nation resistor(s) should be selected and applied such that the combined resistance of the termination resistor(s) and the input impedance of the AD8321 results in a match between the signal source impedance and the input impedance of the AD8321. The evaluation board is designed to accommodate Mini-Circuits T1 6T-KK81 1:1 transformer for the purposes of converting a single-ended (i.e., ground referenced) input signal to differen tial inputs. The following paragraphs identify three options for providing differential input signals to the AD8321 evaluation board. Option 1 uses a transformer to produce a truly differen tial input signal. The termination resistor(s) specified in Option 1 and 2 may also be used without the transformer if a differen tial signal source is available. Option 2 uses a transformer and- produces ground referenced input signals that are separated in phase by 180 ∞. Option 3 relies on differential signals provided by the user and does not employ a transformer for single-to differential conversion. Differential Input Option 1: Install the Mini-Circuits T1-6T KK81 1:1 transformer in the T1 location of the evaluation board. Jumpers J1, J2 and J3 should be applied pointing in the direction of the transformer. A differential input termination resistor of 82.5 W can be used in the R3 position. This value should be used when the single-ended input signal has a source impedance of 75 W. In this configuration, the input signal must be applied to the VIN+/DIFF IN port of the evaluation board. An open circuit is required in R1, R2 and J4 positions resulting in a 75 W differential input termination to the AD8321. If a 50 W single-ended input source is applied to the VIN+/DIFF IN port, the R3 value should be 53.6 W. Windows is a registered trademark of Microsoft Corporation. *Alpha Industries @ www.alphaind.com REV. A –11– |
Podobny numer części - AD8321 |
|
Podobny opis - AD8321 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |