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AD8375-EVALZ Arkusz danych(PDF) 3 Page - Analog Devices |
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AD8375-EVALZ Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 6 page Preliminary Technical Data AD8375 Rev. PrB | Page 3 of 6 Parameter Conditions Min Typ Max Unit 200 MHz Gain Code = 00000 Noise Figure 8.5 dB Second Harmonic VOUT = 2 V p-p -85 dBc Third Harmonic VOUT = 2 V p-p -88 dBc Output IP3 2 MHz spacing, +3 dBm per tone 50 dBm Output 1 dB Compression Point 18 dBm POWER-INTERFACE Supply Voltage 4.5 5.5 V Quiescent Current per Channel thermal connection made to exposed paddle under device 130 140 mA vs. Temperature −40°C ≤ TA ≤ +85°C 165 mA Power Down Current PWUP Low 3 mA vs. Temperature −40°C ≤TA ≤ +85°C TBD mA ENABLE INTERFACE Pin PWUP Enable Threshold Minimum voltage to enable the device 1.6 V PWUP Input Bias Current 0.5 nA GAIN CONTROL INTERFACE Pins A0, A1, A2, A3, A4 VIH Minimum voltage for a logic high 1.6 V VIL Maximum voltage for a logic low 0.8 Maximum Input Bias Current 900 nA Table 2. Gain-Code versus Voltage Gain Look-Up Table 5-Bit Binary Gain Code Voltage Gain (dB) 5-Bit Binary Gain Code Voltage Gain (dB) 00000 20 01101 7 00001 19 01110 6 00010 18 01111 5 00011 17 10000 4 00100 16 10001 3 00101 15 10010 2 00110 14 10011 1 00111 13 10100 0 01000 12 10101 -1 01001 11 10110 -2 01010 10 10111 -3 01011 9 11000 -4 01100 8 >11000 -4 |
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