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FAN2106EMPX Arkusz danych(PDF) 11 Page - Fairchild Semiconductor

Numer części FAN2106EMPX
Szczegółowy opis  TinyBuck 6A, 24V Input Integrated Synchronous Buck Regulator
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN2106 Rev. 1.0.1
11
Calculating the Inductor Value
Typically the inductor is set for a ripple current (
ΔIL) of
10% to 35% of the maximum DC load. Regulators
requiring fast transient response use a value on the high
side of this range, while regulators that require very low
output ripple and/or use high-ESR capacitors restrict
allowable ripple current:
F
L
D)
-
(1
V
I
OUT
L
=
Δ
EQ. 5
where F is the oscillator frequency, and
F
I
D)
-
(1
V
L
L
OUT
Δ
=
EQ. 6
Setting the Ramp Resistor Value
The internal ramp voltage excursion (ΔVRAMP) during tON
should be set to 0.6V. RRAMP is approximately:
2
F
V
10
x
18
V
)
8
.
1
V
(
R
IN
6
OUT
IN
)
K
(
RAMP
=
Ω
EQ. 7
where frequency (F) is expressed in KHz.
Setting the Current Limit
The FAN2106 uses its internal low-side MOSFET as the
current-sensing element. The current-limit threshold
voltage (VILIM) is compared to the voltage drop across
the low-side MOSFET, sampled at the end of each
PWM off-time/cycle.
The default threshold (ILIM open) is temperature
compensated.
The 10µA current sourced from the ILIM pin can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external resistor
(RILIM) to AGND:
5
.
142
)
2
I
I
(
K
R
45
.
0
R
L
OUT
T
DS
)
K
(
ILIM
+
Δ
=
Ω
EQ. 8
where:
I = desired current limit set point in Amps,
RDS is expressed in mΩ,
KT = the normalized temperature coefficient of the
low-side MOSFET (Q2) from Figure 8.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle.
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 21 shows a complete
Type-3 compensation network. Type-2 compensation
eliminates R3 and C3.
Figure 21. Compensation Network
Since the FAN2106 employs summing current-mode
architecture, Type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, Type-3 compensation may be required. The
AN-6033 spreadsheet calculator can be used to
calculate these component values.
Protection
The converter output is monitored and protected against
extreme overload, short-circuit, over-voltage, and under-
voltage conditions.
An internal “Fault Latch” is set for any fault intended to
shut down the IC. When the fault latch is set, the IC
discharges VOUT by enhancing the low-side MOSFET
until FB<0.25V. The MOSFET is not turned on again
unless FB>0.5V. This behavior discharges the output
without causing undershoot (negative output voltage).
GATE
DRIVE
PWM
0.25/0.5V
FAULT
PWM LATCH
FB
Figure 22. Latched Fault Response
Under-Voltage Shutdown
If FB remains below the under-voltage threshold for 16
consecutive clock cycles, the fault latch is set and the
converter shuts down. This fault is prevented from
setting the fault latch during soft-start.
Over-Voltage Protection / Shutdown
If FB exceeds 115%
V
REF for two consecutive clock
cycles, the fault latch is set and shutdown occurs.
A shorted high-side MOSFET condition is detected
when SW voltage exceeds ~0.7V while the low-side


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