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AM29LV065D Arkusz danych(PDF) 5 Page - Advanced Micro Devices

Numer części AM29LV065D
Szczegółowy opis  64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
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Producent  AMD [Advanced Micro Devices]
Strona internetowa  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29LV065D Arkusz danych(HTML) 5 Page - Advanced Micro Devices

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February 16, 2006
Am29LV065D
5
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29LV065D Device Bus Operations ..............................11
VersatileIO
TM (V
IO) Control ...................................................... 11
Requirements for Reading Array Data ................................... 11
Writing Commands/Command Sequences ............................ 12
Accelerated Program Operation ............................................. 12
Autoselect Functions .............................................................. 12
Standby Mode ........................................................................ 12
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 13
Table 2. Sector Address Table ........................................................13
Autoselect Mode ..................................................................... 17
Table 3. Am29LV065D Autoselect Codes, (High Voltage Method) 17
Sector Group Protection and Unprotection ............................. 18
Table 4. Sector Group Protection/Unprotection Address Table .....18
Temporary Sector Group Unprotect ....................................... 19
Figure 1. Temporary Sector Group Unprotect Operation................ 19
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 20
SecSi (Secured Silicon) Sector Flash Memory Region .......... 21
Table 5. SecSi Sector Contents ......................................................21
Figure 3. SecSi Sector Protect Verify.............................................. 22
Hardware Data Protection ...................................................... 22
Low VCC Write Inhibit ............................................................ 22
Write Pulse “Glitch” Protection ............................................... 22
Logical Inhibit .......................................................................... 22
Power-Up Write Inhibit ............................................................ 22
Common Flash Memory Interface (CFI) . . . . . . . 22
Table 6. CFI Query Identification String .......................................... 23
System Interface String................................................................... 23
Table 8. Device Geometry Definition .............................................. 23
Table 9. Primary Vendor-Specific Extended Query ........................ 24
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................ 25
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Enter SecSi Sector/Exit SecSi Sector
Command Sequence .............................................................. 25
Byte Program Command Sequence ....................................... 26
Unlock Bypass Command Sequence ..................................... 26
Figure 4. Program Operation .......................................................... 26
Chip Erase Command Sequence ........................................... 27
Sector Erase Command Sequence ........................................ 27
Erase Suspend/Erase Resume Commands ........................... 27
Figure 5. Erase Operation............................................................... 28
Command Definitions ............................................................. 29
Table 10. Am29LV065D Command Definitions ............................. 29
Write Operation Status . . . . . . . . . . . . . . . . . . . . 30
DQ7: Data# Polling ................................................................. 30
Figure 6. Data# Polling Algorithm .................................................. 30
RY/BY#: Ready/Busy# ............................................................ 31
DQ6: Toggle Bit I .................................................................... 31
Figure 7. Toggle Bit Algorithm........................................................ 31
DQ2: Toggle Bit II ................................................................... 32
Reading Toggle Bits DQ6/DQ2 ............................................... 32
DQ5: Exceeded Timing Limits ................................................ 32
DQ3: Sector Erase Timer ....................................................... 32
Table 11. Write Operation Status ................................................... 33
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34
Figure 8. Maximum Negative Overshoot Waveform ..................... 34
Figure 9. Maximum Positive Overshoot Waveform....................... 34
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 34
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 10. I
CC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) ............................................................. 36
Figure 11. Typical I
CC1 vs. Frequency ............................................ 36
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 12. Test Setup.................................................................... 37
Table 12. Test Specifications ......................................................... 37
Figure 13. Input Waveforms and Measurement Levels ................. 37
Key to Switching Waveforms. . . . . . . . . . . . . . . . 37
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Read-Only Operations ........................................................... 38
Figure 14. Read Operation Timings ............................................... 38
Hardware Reset (RESET#) .................................................... 39
Figure 15. Reset Timings ............................................................... 39
Erase and Program Operations .............................................. 40
Figure 16. Program Operation Timings.......................................... 41
Figure 17. Accelerated Program Timing Diagram.......................... 41
Figure 18. Chip/Sector Erase Operation Timings .......................... 42
Figure 19. Data# Polling Timings (During Embedded Algorithms). 43
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 44
Figure 21. DQ2 vs. DQ6................................................................. 44
Temporary Sector Unprotect .................................................. 45
Figure 22. Temporary Sector Group Unprotect Timing Diagram ... 45
Figure 23. Sector Group Protect and Unprotect Timing Diagram .. 46
Figure 24. Alternate CE# Controlled Write
(Erase/Program) Operation Timings .............................................. 48
Erase And Programming Performance . . . . . . . 49
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 49
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 49
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 50
TS 048—48-Pin Standard Pinout Thin Small Outline
Package (TSOP) ..................................................................... 50
FBE063—63-Ball Fine-Pitch Ball Grid Array (FBGA)
11 x 12 mm package .............................................................. 51


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