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AM29LV065MU120WHI Arkusz danych(PDF) 6 Page - Advanced Micro Devices

Numer części AM29LV065MU120WHI
Szczegółowy opis  64 Megabit (8 M x 8-Bit) MirrorBit??3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O??Control
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Producent  AMD [Advanced Micro Devices]
Strona internetowa  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29LV065MU120WHI Arkusz danych(HTML) 6 Page - Advanced Micro Devices

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Am29LV065MU
September 12, 2006
DA TA
SH EET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations .....................................................10
VersatileIO
™ (V
IO) Control ..................................................... 10
Requirements for Reading Array Data ................................... 10
Page Mode Read .................................................................... 11
Writing Commands/Command Sequences ............................ 11
Write Buffer ............................................................................. 11
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Sector Address Table ........................................................13
Autoselect Mode..................................................................... 17
Table 3. Autoselect Codes, (High Voltage Method) .......................17
Sector Group Protection and Unprotection ............................. 18
Table 4. Sector Group Protection/Unprotection Address Table .....18
Temporary Sector Group Unprotect ....................................... 19
Figure 1. Temporary Sector Group Unprotect Operation................ 19
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 20
SecSi (Secured Silicon) Sector Flash Memory Region .......... 21
Table 5. SecSi Sector Contents ......................................................21
Figure 3. SecSi Sector Protect Verify.............................................. 22
Hardware Data Protection ...................................................... 22
Low VCC Write Inhibit ............................................................ 22
Write Pulse “Glitch” Protection ............................................... 22
Logical Inhibit .......................................................................... 22
Power-Up Write Inhibit ............................................................ 22
Common Flash Memory Interface (CFI) . . . . . . . 22
Table 6. CFI Query Identification String .............................. 23
Table 7. System Interface String......................................................23
Table 8. Device Geometry Definition................................... 24
Table 9. Primary Vendor-Specific Extended Query............. 25
Command Definitions . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................ 25
Reset Command ..................................................................... 26
Autoselect Command Sequence ............................................ 26
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 26
Byte Program Command Sequence ....................................... 26
Unlock Bypass Command Sequence ..................................... 27
Write Buffer Programming ...................................................... 27
Accelerated Program .............................................................. 28
Figure 4. Write Buffer Programming Operation............................... 29
Figure 5. Program Operation .......................................................... 30
Program Suspend/Program Resume Command Sequence ... 30
Figure 6. Program Suspend/Program Resume............................... 31
Chip Erase Command Sequence ........................................... 31
Sector Erase Command Sequence ........................................ 31
Erase Suspend/Erase Resume Commands ........................... 32
Figure 7. Erase Operation............................................................... 33
Command Definitions ............................................................. 34
Table 10. Command Definitions.......................................................34
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 35
DQ7: Data# Polling ................................................................. 35
Figure 8. Data# Polling Algorithm .................................................. 35
RY/BY#: Ready/Busy#............................................................ 36
DQ6: Toggle Bit I .................................................................... 36
Figure 9. Toggle Bit Algorithm........................................................ 36
DQ2: Toggle Bit II ................................................................... 37
Reading Toggle Bits DQ6/DQ2 ............................................... 37
DQ5: Exceeded Timing Limits ................................................ 37
DQ3: Sector Erase Timer ....................................................... 37
DQ1: Write-to-Buffer Abort ..................................................... 38
Table 11. Write Operation Status ................................................... 38
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 39
Figure 10. Maximum Negative Overshoot Waveform ................... 39
Figure 11. Maximum Positive Overshoot Waveform..................... 39
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 39
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 1. Maximum Negative Overshoot Waveform ..................... 39
Figure 2. Maximum Positive Overshoot Waveform....................... 39
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 39
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 12. Test Setup.................................................................... 41
Table 12. Test Specifications ......................................................... 41
Key to Switching Waveforms. . . . . . . . . . . . . . . . 41
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 41
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 42
Read-Only Operations ........................................................... 42
Figure 14. Read Operation Timings ............................................... 42
Figure 15. Page Read Timings ...................................................... 43
Hardware Reset (RESET#) .................................................... 44
Figure 16. Reset Timings ............................................................... 44
Erase and Program Operations .............................................. 45
Figure 17. Program Operation Timings.......................................... 46
Figure 18. Accelerated Program Timing Diagram.......................... 46
Figure 19. Chip/Sector Erase Operation Timings .......................... 47
Figure 20. Data# Polling Timings
(During Embedded Algorithms)...................................................... 48
Figure 21. Toggle Bit Timings
(During Embedded Algorithms)...................................................... 49
Figure 22. DQ2 vs. DQ6................................................................. 49
Temporary Sector Unprotect .................................................. 50
Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 50
Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 51
Alternate CE# Controlled Erase and Program Operations ..... 52
Figure 25. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 53
Erase And Programming Performance. . . . . . . . 54
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 54
TSOP Pin and BGA Package Capacitance . . . . . 55
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 56
TS 048—48-Pin Standard Thin Small Outline Package ......... 56
TSR048—48-Pin Reverse Thin Small Outline Package ......... 57
FBE063—63-Ball Fine-Pitch Ball Grid Array, 12 x 11 mm
Package .................................................................................. 58
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 59


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