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NE1617DS Arkusz danych(PDF) 6 Page - NXP Semiconductors |
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NE1617DS Arkusz danych(HTML) 6 Page - NXP Semiconductors |
6 / 16 page Philips Semiconductors Product specification NE1617 Temperature monitor for microprocessor systems 1999 Mar 19 6 SMBUS INTERFACE AC SPECIFICATIONS VDD = 3.0V to 3.6V; Tamb = 0_C to +125_C unless otherwise noted. These specifications are guaranteed by design and not tested in production. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT VIH Logic input high voltage for STBY, SCLK, SDATA VDD=3V to 5.5V 2.2 V VIL Logic input low voltage for STBY, SCLK, SDATA VDD=3v to 5.5V 0.8 V IOL Logic output low sink current for ALERT SDATA VOL= 0.4V VOL=0.6V 1.0 6.0 mA mA IIH & IIL Logic input current VIN=VDD or GND –1.0 1.0 µA CIN SMBus input capacitance for SCLK,SDATA 5 pF fSCLK SCLK operating frequency See Figure 3 0 100 kHz tLOW SCLK low time See Figure 3 4.7 5.0 µS tHIGH SCLK high time See Figure 3 4.0 5.0 µS tBUF SMBus free time. Delay from SDA stop to SDA start See Figure 3 4.7 µS tHD:STA Hold time of start condition. Delay from SDA start to first SCL H–L See Figure 3 4.0 µS tHD:DAT Hold time of data. Delay from SCL H–L to SDA edges See Figure 3 0 ns tSU:DAT Setup time of data. Delay from SDA edges to SCL L–H See Figure 3 250 ns tSU:STA Setup time of repeat start condition. Delay from SCL L–H to restart SDA See Figure 3 250 ns tSU:STO Setup time of stop condition. Delay from SCL L–H to SDA stop. See Figure 3 4.0 µS tF Fall time of SCL & SDA See Figure 3 1.0 µS tBUF P S SCLK SDATA SL01204 tHD:STA SP tLOW tR tF tHD:STA tHD:DAT tHIGH tSU:DAT tSU:STA tSU:STO Figure 3. Timing Measurements NOTE: The NE1617 does not include the SMBUS timeout capability (tLOW:SEXT and tLOW:MEXT). |
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