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ISL29004IROZ-T7 Arkusz danych(PDF) 8 Page - Intersil Corporation |
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ISL29004IROZ-T7 Arkusz danych(HTML) 8 Page - Intersil Corporation |
8 / 17 page 8 FN6221.0 December 21, 2006 Interrupt persist; Bits 1 and 0. The interrupt pin and the interrupt flag is triggered/set when the data sensor reading is out of the interrupt threshold window after m consecutive number of integration cycles. The interrupt persist bits determine m. Interrupt Threshold HI Register 02(hex) This register sets the the HI threshold for the interrupt pin and the interrupt flag. By default the Interrupt threshold HI is FF(hex). The 8-bit data written to the register represents the upper MSB of a 16-bit value. The LSB is always 00(hex). Interrupt Threshold LO Register 03(hex) This register sets the the LO threshold for the interrupt pin and the interrupt flag. By default the Interrupt threshold LO is 00(hex). The 8-bit data written to the register represents the upper MSB of a 16-bit value. The LSB is always 00(hex). Sensor Data Register 04(hex) and 05(hex) When the device is configured to output a 16-bit data, the most significant byte is accessed at 04(hex), and the least significant byte can be accessed at 05(hex). The sensor data register is refreshed after very integration cycle. Timer Data Register 06(hex) and 07(hex) Note that the timer counter value is only available when using the External Timing Mode. The 06(hex) and 07(hex) are the LSB and MSB respectively of a 16-bit timer counter value corresponding to the most recent sensor reading. Each clock cycle increments the counter. At the end of each integration period, the value of this counter is made available over the I2C. This value can be used to eliminate noise introduced by slight timing errors caused by imprecise external timing. Microcontrollers, for example, often cannot provide high-accuracy command-to-command timing, and the timer counter value can be used to eliminate the resulting noise. Calculating Lux The ISL29004’s output codes, DATA, are directly proportional to Lux. The proportionality constant α is determined by the Full Scale Range, FSR, and the n-bit ADC which is user defined in the command register. The proportionality constant can also be viewed as the resolution; The smallest Lux measurement the device can measure is α. Full Scale Range, FSR, is determined by the software programmable Range/Gain, Range(k), in the command register and an external scaling resistor REXT which is referenced to 100k Ω. The transfer function effectively for each timing mode becomes: INTERNAL TIMING MODE EXTERNAL TIMING MODE n = 4, 8, 12, or 16. This is the number of clock cycles programmed in the command register. Range(k) is the user defined range in the Gain/Range bit in the command register. REXT is an external scaling resistor hardwired to the REXT pin. DATA is the output sensor reading in number of counts available at the data register. 2n represents the maximum number of counts possible in Internal Timing Mode. For the External Timing Mode the TABLE 9. RANGE/GAIN TYPICAL FSR LUX RANGES BITS 3:2 k RANGE(k) FSR LUX RANGE@ REXT = 100k FSR LUX RANGE@ REXT = 50k FSR LUX RANGE@ REXT = 500k 0:0 1 973 973 1946 195 0:1 2 3892 3892 7784 778 1:0 3 15,568 15,568 31,136 3114 1:1 4 62,272 62,272 124,544 12,454 TABLE 10. INTERRUPT PERSIST BITS 1:0 NUMBER OF INTEGRATION CYCLES 0:0 1 0:1 4 1:0 8 1:1 16 TABLE 11. DATA REGISTERS ADDRESS (hex) CONTENTS 04 Least-significant byte of most recent sensor reading. 05 Most-significant byte of most recent sensor reading. 06 Least-significant byte of timer counter value corresponding to most recent sensor reading. 07 Most-significant byte of timer counter value corresponding to most recent sensor reading. E α DATA × = (EQ. 1) α FSR 2 n ------------ = (EQ. 2) (EQ. 3) FSR Range k () 100kΩ R EXT ------------------ × = (EQ. 4) E Range k () 100kΩ R EXT ------------------ × 2 n ---------------------------------------------------- DATA × = (EQ. 5) E Range k () 100kΩ R EXT ------------------ × COUNTER ---------------------------------------------------- DATA × = ISL29004 |
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