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ADC14C065CISQ Arkusz danych(PDF) 9 Page - National Semiconductor (TI) |
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ADC14C065CISQ Arkusz danych(HTML) 9 Page - National Semiconductor (TI) |
9 / 17 page ADC14C080 Dynamic Converter Electrical Characteristics (Continued) Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V A = +3.0V, VDR = +2.5V, Internal VREF = +1.2V, f CLK = 80 MHz, VCM =VCMO,CL = 5 pF/pin, . Typical values are for TA = 25˚C. Boldface limits apply for TMIN ≤ T A ≤ T MAX. All other limits apply for TA = 25˚C (Note 8) (Note 9) Symbol Parameter Conditions Typical (Note 10) Limits Units (Limits) SINAD Signal-to-Noise and Distortion Ratio f IN = 10 MHz 74 dBFS f IN = 70 MHz 71.8 dBFS f IN = 170 MHz 71.4 dBFS ADC14C080 Logic and Power Supply Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V A = +3.0V, VDR = +2.5V, Internal VREF = +1.2V, f CLK = 80 MHz, VCM =VCMO,CL = 5 pF/pin. Typical values are for TA = 25˚C. Boldface limits apply for TMIN ≤ T A ≤ T MAX. All other limits apply for TA = 25˚C (Notes 8, 9) Symbol Parameter Conditions Typical (Note 10) Limits Units (Limits) DIGITAL INPUT CHARACTERISTICS (CLK, PD) V IN(1) Logical “1” Input Voltage V D = 3.6V 2.0 V (min) V IN(0) Logical “0” Input Voltage V D = 3.0V 0.8 V (max) I IN(1) Logical “1” Input Current V IN = 3.3V 10 µA I IN(0) Logical “0” Input Current V IN = 0V −10 µA C IN Digital Input Capacitance 5 pF DIGITAL OUTPUT CHARACTERISTICS (D0–D13, DRDY) V OUT(1) Logical “1” Output Voltage I OUT = −0.5 mA , VDR = 1.8V 1.2 V (min) V OUT(0) Logical “0” Output Voltage I OUT = 1.6 mA, VDR = 1.8V 0.4 V (max) +I SC Output Short Circuit Source Current V OUT = 0V −10 mA −I SC Output Short Circuit Sink Current V OUT =VDR 10 mA C OUT Digital Output Capacitance 5 pF POWER SUPPLY CHARACTERISTICS I A Analog Supply Current Full Operation 100 mA (max) I DR Digital Output Supply Current Full Operation (Note 13) 13 mA Power Consumption Excludes I DR (Note 13) 300 mW (max) Power Down Power Consumption Clock disabled 5 mW ADC14C080 Timing and AC Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V A = +3.0V, VDR = +2.5V, Internal VREF = +1.2V, f CLK = 80 MHz, VCM =VCMO,CL = 5 pF/pin. Typical values are for TA = 25˚C. Timing measurements are taken at 50% of the signal amplitude. Boldface limits apply for T MIN ≤ T A ≤ T MAX. All other limits apply for TA = 25˚C (Notes 8, 9) Symb Parameter Conditions Typical (Note 10) Limits Units (Limits) Maximum Clock Frequency 80 MHz (max) Minimum Clock Frequency 20 MHz (min) t CH Clock High Time 6 ns t CL Clock Low Time 6 ns t CONV Conversion Latency 7 Clock Cycles t OD Output Delay of CLK to DATA Relative to rising edge of CLK 4 2 6 ns (min) ns(max) t SU Data Output Setup Time Relative to DRDY 5 ns (min) t H Data Output Hold Time Relative to DRDY 5 ns (min) t AD Aperture Delay 0.6 ns t AJ Aperture Jitter 0.1 ps rms www.national.com 9 |
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