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ADS802U Arkusz danych(PDF) 2 Page - Burr-Brown (TI) |
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ADS802U Arkusz danych(HTML) 2 Page - Burr-Brown (TI) |
2 / 17 page ADS802 2 SBAS039B www.ti.com ABSOLUTE MAXIMUM RATINGS(1) +VS ........................................................................................................ +6V Analog Input .............................................................. 0V to (+VS + 300mV) Logic Input ................................................................. 0V to (+VS + 300mV) Case Temperature .......................................................................... +100 °C Junction Temperature ..................................................................... +150 °C Storage Temperature ...................................................................... +125 °C External Top Reference Voltage (REFT) .................................. +3.4V Max External Bottom Reference Voltage (REFB) .............................. +1.1V Min ADS802U PARAMETER CONDITIONS TEMP MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = +5V, and Sampling Rate = 10MHz, and with a 50% duty cycle clock having 2ns rise-and-fall time, unless otherwise noted. RESOLUTION 12 Bits Specified Temperature Range TAMBIENT –40 +85 °C ANALOG INPUT Differential Full-Scale Input Range Both Inputs +1.25 +3.25 V Common-Mode Voltage +2.25 V Analog Input Bandwidth (–3dB) Small-Signal –20dBFS(1) Input +25 °C 400 MHz Full-Power 0dBFS Input +25 °C65 MHz Input Impedance 1.25 || 4 M Ω || pF DIGITAL INPUT Logic Family TTL/HCT Compatible CMOS Convert Command Start Conversion Falling Edge ACCURACY(2) fS = 2.5MHz Gain Error +25 °C ±0.6 ±1.5 % Full ±1.0 ±2.5 % Gain Tempco ±85 ppm/ °C Power-Supply Rejection of Gain ∆ +V S = ±5% +25 °C 0.03 0.1 %FSR/% Input Offset Error Full ±2.1 ±3.0 % Power-Supply Rejection of Offset ∆ +V S = ±5% +25 °C 0.05 0.1 %FSR/% CONVERSION CHARACTERISTICS Sample Rate 10k 10M Sample/s Data Latency 6.5 Convert Cycle DYNAMIC CHARACTERISTICS Differential Linearity Error f = 500kHz +25 °C ±0.3 ±1.0 LSB 0 °C to +85°C ±0.4 ±1.0 LSB f = 5MHz +25 °C ±0.4 ±1.0 LSB 0 °C to +85°C ±0.4 ±1.0 LSB No Missing Codes 0 °C to +85°C Tested LSB Integral Linearity Error at f = 500kHz Best Fit 0 °C to +85°C ±1.7 ±2.75 LSB Spurious-Free Dynamic Range (SFDR) f = 500kHz (–1dBFS input) +25 °C 67 77 dBFS Full 66 75 dBFS f = 5MHz (–1dBFS input) +25 °C 63 67 dBFS Full 62 66 dBFS NOTE: (1) Stresses above these ratings may permanently damage the device. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY ADS802U SO-28 DW –40 °C to +85°C ADS802U ADS802U Rails, 28 ADS802U "" " ADS802U ADS802U/1K Tape and Reel, 1000 PACKAGE/ORDERING INFORMATION(1) NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. NOTES: (1) dBFS refers to dB below Full-Scale. (2) Percentage accuracies are referred to the internal A/D converter Full-Scale Range of 4Vp-p. (3) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal ( ≈0dB), the intermodulation products will be 7dB lower. (4) No “rollover” of bits. |
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