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TC4428CUA Arkusz danych(PDF) 9 Page - Microchip Technology |
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TC4428CUA Arkusz danych(HTML) 9 Page - Microchip Technology |
9 / 20 page © 2006 Microchip Technology Inc. DS21422D-page 9 TC4426/TC4427/TC4428 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE (1) 3.1 Inputs A and B MOSFET driver inputs A and B are high-impedance, TTL/CMOS compatible inputs. These inputs also have 300 mV of hysteresis between the high and low thresholds that prevents output glitching even when the rise and fall time of the input signal is very slow. 3.2 Ground (GND) Ground is the device return pin. The ground pin(s) should have a low-impedance connection to the bias supply source return. High peak currents will flow out the ground pin(s) when the capacitive load is being discharged. 3.3 Output A and B MOSFET driver outputs A and B are low-impedance, CMOS push-pull style outputs. The pull-down and pull- up devices are of equal strength, making the rise and fall times equivalent. 3.4 Supply Input (VDD) The VDD input is the bias supply for the MOSFET driver and is rated for 4.5V to 18V with respect to the ground pin. The VDD input should be bypassed with local ceramic capacitors. The value of these capacitors should be chosen based on the capacitive load that is being driven. A value of 1.0 μF is suggested. 3.5 Exposed Metal Pad The exposed metal pad of the 6x5 DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board, to aid in heat removal from the package. 8-Pin PDIP/ MSOP/SOIC 8-Pin DFN Symbol Description 1 1 NC No connection 2 2 IN A Input A 33 GND Ground 4 4 IN B Input B 55 OUT B Output B 66 VDD Supply input 77 OUT A Output A 8 8 NC No connection — PAD NC Exposed Metal Pad Note 1: Duplicate pins must be connected for proper operation. |
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