STK14D88

9

February 2007

Document Control #ML0033 Rev 1.7

HARDWARE STORE CYCLE

Note n: Read and Write cycles in Progress before HSB is asserted are given this amount of time to complete

HARDWARE STORE CYCLE

SYMBOLS

PARAMETER

STK14D88

UNITS

NOTES

Standard

Alternate

MIN

MAX

Hardware STORE to SRAM Disabled

1

70

μsn

Hardware STORE Pulse Width

15

ns

HSB (OUT)

HSB (IN)

DQ (DATA OUT)

31

SRAM Enabled

32

SRAM Enabled

23

Soft Sequence Commands

Notes:

o: This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register com-

mand.

p: Commands like Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.

NO.

SYMBOLS

PARAMETER

STK14

D88

UNITS

NOTES

Standard

MIN

MAX

Soft Sequence Processing Time

70

μso,p

Vcc

34

ADDRESS

ADDRESS #1

Soft Sequence Command

ADDRESS #6

ADDRESS #1

Soft Sequence Command

ADDRESS #6

34

31

32

34