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CDCEL913PW Arkusz danych(PDF) 10 Page - Texas Instruments |
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CDCEL913PW Arkusz danych(HTML) 10 Page - Texas Instruments |
10 / 21 page www.ti.com DEFAULT DEVICE CONFIGURATION EEPROM Xin Xout GND LV CMOS Pdiv1 =1 LV CMOS Pdiv3 = 1 Pdiv2 = 1 LV CMOS InputClock PLL Bypass PLL 1 powerdown S0 SDA SCL ProgrammingBus 27MHz Crystal 1=OutputEnabled 0=Output3-State X-tal Programming and SDA/SCL Register VDD VDDOUT Y1=27MHz Y2=27MHz Y3=27MHz SDA/SCL SERIAL INTERFACE CDCE913 CDCEL913 SCAS849A – JUNE 2007 – REVISED AUGUST 2007 S1/SDA and S2/SCL pins of the CDCE913/CDCEL913 are dual function pins. In default configuration they are defined as SDA/SCL for the serial programming interface. They can be programmed as control-pins (S1/S2) by setting the appropriate bits in the EEPROM. Note that the changes to the Control Register (Bit [6] of Byte 02h) have no effect until they are written into the EEPROM. Once they are set as control pins, the serial programming interface is no longer available. However, if VDDOUT is forced to GND, the two control pins, S1 and S2, temporally act as serial programming pins (SDA/SCL). S0 is not a multi use pin; it is a control pin only. The internal EEPROM of CDCE913/CDCEL913 is pre-configured with a factory default configuration as shown in Figure 6 (The input frequency is passed through the output as a default).This allows the device to operate in default mode without the extra production step of programming it. The default setting appears after power is supplied or after power-down/up sequence until it is reprogrammed by the user to a different application configuration. A new register setting is programmed via the serial SDA/SCL Interface. Figure 6. Default Configuration A different default setting can be programmed upon customer request. Contact Texas Instruments sales or marketing representative for more information. Table 4 shows the factory default setting for the Control Terminal Register. Note that even though 8 different register settings are possible, in default configuration, only the first two settings (0 and 1) can be selected with S0, as S1 and S2 are configured as programming pins in default mode. Table 4. Factory Default Setting for Control Terminal Register(1) Y1 PLL1 Settings External Control Pins Output Selection Frequency Selection SSC Selection Output Selection S2 S1 S0 Y1 FS1 SSC1 Y2Y3 SCL (I2C) SDA (I2C) 0 3-state fVCO1_0 off 3-state SCL (I2C) SDA (I2C) 1 enabled fVCO1_0 off enabled (1) In default mode or when programmed respectively, S1 and S2 act as serial programming interface, SDA/SCL. They do not have any control-pin function but they are internally interpreted as if S1=0 and S2=0. S0, however, is a control-pin which in the default mode switches all outputs ON or OFF (as previously predefined). The CDCE913/CDCEL913 operates as a slave device of the 2-wire serial SDA/SCL bus, compatible with the popular SMBus or I2C specification. It operates in the standard-mode transfer (up to 100kbit/s) and fast-mode transfer (up to 400kbit/s) and supports 7-bit addressing. The S1/SDA and S2/SCL pins of the CDCE913/CDCEL913 are dual function pins. In the default configuration they are used as SDA/SCL serial programming interface. They can be re-programmed as general purpose control pins, S1 and S2, by changing the corresponding EEPROM setting, Byte 02h, Bit [6]. 10 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): CDCE913 CDCEL913 |
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