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AD7843ARQ Arkusz danych(PDF) 11 Page - Analog Devices |
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AD7843ARQ Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 16 page REV. 0 AD7843 –11– reference mode can only be used with +VCC as the source of the +REF voltage and cannot be used with VREF. The disadvantage of this mode of operation is that during both the acquisition phase and conversion process, the external touch screen must remain powered. This will result in additional sup- ply current for the duration of the conversion. X+ Y– Y+ IN+ +VCC GND IN– REF– IN+ ADC CORE REF+ Figure 7. Differential Reference Mode (SER/ DFR = 0) CONTROL REGISTER The control word provided to the ADC via the DIN pin is shown in Table II. This provides the conversion start, channel addressing, ADC conversion resolution, configuration and power-down of the AD7843. Table II provides detailed infor- mation on the order and description of these control bits within the control word. Initiate START The first bit, the “S” bit, must always be set to 1 to initiate the start of the control word. The AD7843 will ignore any inputs on the DIN line until the start bit is detected. Channel Addressing The next three bits in the control register, A2, A1 and A0, select the active input channel(s) of the input multiplexer (see Table I and Figure 4), touch screen drivers, and the reference inputs. MODE The MODE bit sets the resolution of the analog to digital con- verter. With a 0 in this bit the following conversion will have 12 bits of resolution. With a 1 in this bit the following conver- sion will have 8 bits of resolution. SER/ DFR The SER/ DFR bit controls the reference mode which can be either single ended or differential if a 1 or a 0 is written to this bit respectively. The differential mode is also referred to as the ratiometric conversion mode. This mode is optimum for X-Position and Y-Position measurements. The reference is derived from the voltage at the switch drivers, which is almost the same as the voltage to the touch screen. In this case a sepa- rate reference voltage is not needed as the reference voltage to the analog to digital converter is the voltage across the touch screen. In the single-ended mode, the reference voltage to the converter is always the difference between the VREF and GND pins. See Table I and Figures 4 through 7 for further information. As the supply current required by the device is so low, a preci- sion reference can be used as the supply source to the AD7843. It may also be necessary to power the touch screen from the reference, which may require 5 mA to 10 mA. A REF19x volt- age reference can source up to 30 mA and, as such, could supply both the ADC and the touch screen. Care must be taken, how- ever, to ensure that the input voltage applied to the ADC does not exceed the reference voltage and hence the supply voltage. See Maximum Ratings section. NOTE: The differential mode can only be used for X-Position and Y-Position measurements All other measurements require the single-ended mode. PD0 and PD1 The power management options are selected by programming the power management bits, PD0 and PD1, in the control regis- ter. Table III summarizes the available options. Table II. Control Register Bit Function Description MSB LSB S A2 A1 A0 MODE SER/ DFR PD1 PD0 Bit Mnemonic Comment 7 S Start Bit. The Control word starts with the first high bit on DIN. A new control word can start every fifteenth DCLK cycle when in the 12-bit conversion mode or every eleventh DCLK cycle when in 8-bit conversion mode. 6–4 A2–A0 Channel Select Bits. These three address bits along with the SER/ DFR bit control the setting of the multi- plexer input, switches, and reference inputs, as detailed in Table I. 3 MODE 12-Bit/8-Bit Conversion Select Bit. This bit controls the resolution of the following conversion. With a 0 in this bit the conversion will have 12-bit resolution or with a 1 in this bit, 8-bit resolution. 2 SER/ DFR Single-Ended/Differential Reference Select Bit. Along with bits A2–A0, this bit controls the setting of the multiplexer input, switches, and reference inputs as described in Table I. 1, 0 PD1, PD0 Power Management Bits. These two bits decode the power-down mode of the AD7843 as shown in Table III. |
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