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CS5451A-IS Arkusz danych(PDF) 11 Page - Cirrus Logic |
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CS5451A-IS Arkusz danych(HTML) 11 Page - Cirrus Logic |
11 / 13 page CS5451A DS635F2 11 shifting of the analog inputs. The CPD pin and capacitor C1 provide the necessary analog supply current as shown in Figure 5. The Schottky diodes D1 and D2 are chosen for their low forward voltages and high-speed capabilities. The capacitor C2 provides the required charge storage and bypassing of the negative supply. The CPD output signal provides the charge pump driver signal. The frequency of the charge pump driver signal is synchronous to XIN. The nominal average frequency is 1 MHz. The level on the VA- pin is fed back internally so that the CPD output will regulate the VA- level to -2/3 of VA+ level. The value of capacitor C1 (see Figure 5) is dependent on the XIN clock frequency. The 39 nF value for C1 was selected for a XIN clock frequency equal to 4.096 MHz. For more information about the operation of this type of charge pump circuit, the reader can refer to Cirrus Log- ic, Inc.’s application note AN152: Using the CS5521/24/28, and CS5525/26 Charge Pump Drive for External Loads. AGND BAT 85 D1 C1 39 nF C2 CPD VA- BAT 85 1µF D2 Figure 5. Generating VA- with a Charge Pump |
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