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STAC9752 Arkusz danych(PDF) 5 Page - Integrated Device Technology |
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STAC9752 Arkusz danych(HTML) 5 Page - Integrated Device Technology |
5 / 95 page STAC9752/9753 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING IDT™ 5 STAC9752/9753 REV 3.3 1206 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING LIST OF FIGURES Figure 1. Block Diagram ................................................................................................................................. 8 Figure 2. Cold Reset Timing ......................................................................................................................... 16 Figure 3. Warm Reset Timing ....................................................................................................................... 16 Figure 4. Clocks Timing ............................................................................................................................... 17 Figure 5. Data Setup and Hold Timing ......................................................................................................... 18 Figure 6. Signal Rise and Fall Times Timing ................................................................................................ 18 Figure 7. AC-Link Low Power Mode Timing .............................................................................................. 19 Figure 8. ATE Test Mode Timing ............................................................................................................... 19 Figure 9. Typical Connection Diagram .......................................................................................................... 20 Figure 10. Split Independent Power Supply Operation ................................................................................. 22 Figure 11. AC-Link to its Companion Controller ........................................................................................... 23 Figure 12. CODEC Clock Source Detection .................................................................................................. 24 Figure 13. STAC9752/9753 Powerdown Timing .......................................................................................... 27 Figure 14. Bi-directional AC-Link Frame with Slot assignments ................................................................... 29 Figure 15. AC-Link Audio Output Frame ...................................................................................................... 33 Figure 16. Start of an Audio Output Frame ................................................................................................... 33 Figure 17. STAC9752/9753 Audio Input Frame ........................................................................................... 36 Figure 18. Start of an Audio Input Frame ...................................................................................................... 36 Figure 19. Bi-directional AC-Link Frame with Slot assignments ................................................................... 41 Figure 20. STAC9752 2-Channel Mixer Functional Diagram ........................................................................ 44 Figure 21. STAC9753 2-Channel Mixer Functional Diagram .......................................................................44 Figure 22. Example of STAC9752/9753 Powerdown/Powerup flow ...........................................................80 Figure 23. Powerdown/Powerup flow with analog still alive ......................................................................... 81 Figure 24. Pin Description Drawing ............................................................................................................... 85 Figure 25. Reflow Profile ..............................................................................................................................90 |
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