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SI5368A-B-GQ Arkusz danych(PDF) 4 Page - Silicon Laboratories |
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SI5368A-B-GQ Arkusz danych(HTML) 4 Page - Silicon Laboratories |
4 / 18 page Si5368 4 Preliminary Rev. 0.3 Figure 1. Typical Phase Noise Plot Table 2. Absolute Maximum Ratings Parameter Symbol Value Unit DC Supply Voltage VDD –0.5 to 2.75 V LVCMOS Input Voltage VDIG –0.3 to (VDD + 0.3) V Junction Temperature TJCT –55 to 150 ºC Storage Temperature Range TSTG –55 to 150 ºC ESD HBM Tolerance (100 pF, 1.5 k Ω)2 kV ESD MM Tolerance 200 V Latch-Up Tolerance JESD78 Compliant Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. 155.52 MHz in, 622.08 MHz out -160 -140 -120 -100 -80 -60 -40 -20 0 100 1000 10000 100000 1000000 10000000 100000000 Offset Frequency (Hz) |
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