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ADSP-21262 Arkusz danych(PDF) 10 Page - Analog Devices |
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ADSP-21262 Arkusz danych(HTML) 10 Page - Analog Devices |
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10 / 48 page  Rev. B | Page 10 of 48 | August 2005 ADSP-21262 EVALUATION KIT Analog Devices offers a range of EZ-KIT Lite ®† evaluation plat- forms to use as a cost-effective method to learn more about developing or prototyping applications with Analog Devices processors, platforms, and software tools. Each EZ-KIT Lite includes an evaluation board along with an evaluation suite of the VisualDSP++ development and debugging environment with the C/C++ compiler, assembler, and linker. Also included are sample application programs, power supply, and a USB cable. All evaluation versions of the software tools are limited for use only with the EZ-KIT Lite product. The USB controller on the EZ-KIT Lite board connects the board to the USB port of the user’s PC, enabling the Visu- alDSP++ evaluation suite to emulate the on-board processor in- circuit. This permits the customer to download, execute, and debug programs for the EZ-KIT Lite system. It also allows in- circuit programming of the on-board flash device to store user- specific boot code, enabling the board to run as a standalone unit, without being connected to the PC. With a full version of VisualDSP++ installed (sold separately), engineers can develop software for the EZ-KIT Lite or any cus- tom-defined system. Connecting an Analog Devices JTAG emulator to the EZ-KIT Lite board enables high speed, nonin- trusive emulation. DESIGNING AN EMULATOR-COMPATIBLE DSP BOARD (TARGET) The Analog Devices family of emulators are tools that every DSP developer needs to test and debug hardware and software systems. Analog Devices has supplied an IEEE 1149.1 JTAG test access port (TAP) on each JTAG DSP. Nonintrusive in-circuit emulation is assured by the use of the processor’s JTAG inter- face—the emulator does not affect target system loading or timing. The emulator uses the TAP to access the internal fea- tures of the DSP, allowing the developer to load code, set breakpoints, observe variables, observe memory, and examine registers. The DSP must be halted to send data and commands, but once an operation has been completed by the emulator, the DSP system is set running at full speed with no impact on sys- tem timing. To use these emulators, the target board must include a header that connects the DSP’s JTAG port to the emulator. For details on target board design issues including mechanical layout, single processor connections, multiprocessor scan chains, signal buffering, signal termination, and emulator pod logic, see the EE-68: Analog Devices JTAG Emulation Technical Reference on the Analog Devices website (www.analog.com)— use site search on “EE-68.” This document is updated regularly to keep pace with improvements to emulator support. ADDITIONAL INFORMATION This data sheet provides a general overview of the ADSP-21262 architecture and functionality. For detailed information on the ADSP-2126x family core architecture and instruction set, refer to the ADSP-2126x DSP Core Manual and the ADSP-21160 SHARC DSP Instruction Set Reference. † EZ-KIT Lite is a registered trademark of Analog Devices, Inc. |
Podobny numer części - ADSP-21262_05 |
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Podobny opis - ADSP-21262_05 |
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