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ST72F63BK4M1 Arkusz danych(PDF) 6 Page - STMicroelectronics |
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ST72F63BK4M1 Arkusz danych(HTML) 6 Page - STMicroelectronics |
6 / 145 page ST7263BDx ST7263BHx ST7263BKx ST7263BE 6/145 1 Introduction The ST7263B microcontrollers form a sub-family of the ST7 MCUs dedicated to USB applications. The devices are based on an industry-standard 8- bit core and feature an enhanced instruction set. They operate at a 24 MHz or 12 MHz oscillator fre- quency. Under software control, the ST7263B MCUs may be placed in either Wait or Halt modes, thus reducing power consumption. The enhanced instruction set and addressing modes afford real programming potential. In addition to standard 8- bit data management, the ST7263B MCUs feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes. The devices in- clude an ST7 Core, up to 32Kbytes of program memory, up to 1024 bytes of RAM, 27 I/O lines and the following on-chip peripherals: – USB low speed interface with 3 endpoints with programmable in/out configuration using the DMA architecture with embedded 3.3V voltage regulator and transceivers (no external compo- nents are needed). – 8-bit analog-to-digital converter (ADC) with 12 multiplexed analog inputs – Industry standard asynchronous SCI serial inter- face – Watchdog – 16-bit timer featuring an external clock input, 2 Input Captures, 2 Output Compares with Pulse Generator capabilities – Fast I²C multimaster interface – Low voltage reset (LVD) ensuring proper power- on or power-off of the device The ST72F63B devices are Flash versions. They support programming in IAP mode (in-application programming) via the on-chip USB interface. Figure 1. General block diagram 8-BIT CORE ALU OSCIN OSCOUT RESET PORT B 16-BIT TIMER PORT A PORT C PB[7:0] (8 bits) PC[2:0] (3 bits) OSCILLATOR INTERNAL CLOCK CONTROL RAM (1024 bytes) PA[7:0] (8 bits) VSS VDD POWER SUPPLY SCI PROGRAM (32K bytes) I²C MEMORY ADC1) (UART) USB SIE OSC/3 LVD WATCHDOG VSSA VDDA VPP/TEST USB DMA USBDP USBDM USBVCC OSC/4 or OSC/2 for USB2) PORT D PD[7:0] (8 bits) 1) ADC channels: 2) 12 or 24 MHz OSCIN frequency required to generate 6 MHz USB clock. None on 24-pin devices 8 on 34 and 32-pin devices (Port B) 12 on 48-pin devices (Port B and Port D[3:0]) 3) The drive from USBVCC is sufficient to only drive an external pull-up in additoin to the internal transceiver |
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