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ML13145-9P Arkusz danych(PDF) 5 Page - LANSDALE Semiconductor Inc.

Numer części ML13145-9P
Szczegółowy opis  UHF Wideband Receiver Subsystem (LNA, Mixer, VCO, Prescaler, IF Subsystem, Coiless Detector)
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Producent  LANSDALE [LANSDALE Semiconductor Inc.]
Strona internetowa  http://www.lansdale.com
Logo LANSDALE - LANSDALE Semiconductor Inc.

ML13145-9P Arkusz danych(HTML) 5 Page - LANSDALE Semiconductor Inc.

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Issue 0
General
The ML13145 is a low power dual conversion wideband FM
receiver incorporating a split IF. This device is designated for
use as the receiver in analog and digital FM systems such as
900 Mhz ISM Band Cordless phones and wideband data links
with data rates up to 150kbps. It contains a 1st and 2nd mixer,
1st and 2nd local oscillator, Received Signal Strength Indicator
(RSSI), IF amplifier, limiting IF, a unique coilless quadrature
detector, and a device enable function.
Current Regulation/Enable
The ML13145 is designed for battery powered portable
applications. Supply current is typically 27 mA at 3.6 Vdc.
Temperature compensating, voltage independent current reg-
ulators are controlled by the Enable Pin where ”high” powers
up and ”low” powers down the entire circuit.
Low Noise Amplifier (LNA)
The LNA is a cascoded common emitter amplifier configu-
ration. Under very large RF input signals, the DC base current
of the common emitter and cascode transistors can become
very significant. To maintain linear operation of the LNA, ade-
quate dc current source is needed to establish the 2Vbe refer-
ence at the base of the RF cascoded transistor and to provide
the base voltage on the common emitter transistor. A sensing
circuit, together with a current mirror guarantees that there is
always sufficient DC base current available for the cascode
transistor under all power levels.
1st and 2nd Mixer
Each mixer is a double–balanced class AB four quadrant
multiplier which may be externally biased for high mixer
dynamic range. Mixer input third order intercept point of up
to17 dBm is achieved with only 7.0 mA of additional supply
current. The 1st mixer has a single–ended input at 50
Ω and
operates at 1.0 GHz with –3.0 dB of power gain at approxi-
mately 100 mVrms LO drive level. The mixers have open col-
lector differential outputs to provide excellent mixer dynamic
range and linearity.
1st Local Oscillator
The 1st LO has an on–chip transistor which operates with
coaxial transmssion line and LC resonant elements up to 1.8
GHz. A VCO output is available for multi–frequency operation
under PLL synthesizer control.
RSSI
The received signal strength indicator (RSSI) output is a cur-
rent proportional to the log of the received signal amplitude.
The RSSI current output (Pin 7) is derived by summing the
currents from the IF and limiting amplifier stages. An increase
in RSSI dynamic range, particularly at higher input signal lev-
els is achieved. The RSSI circuit is designed to provide typical-
ly 80 dB of dynamic range with temperature compensation.
Linearity of the RSSI is optimized by using external ceramic
bandpass filters which have an insertion loss of 4.0 dB and
330
Ω source and load impedance.
IF Amplifier
The first IF amplifier section is composed of three differen-
tial stages with the second and third stages contributing to the
RSSI. This section has internal DC feedback and external input
decoupling for improved symmetry and stability. The total gain
of the IF amplifier block is approximately 40 dB up to 40MHz.
The fixed internal input impedance is 330
Ω. When using
ceramic filters requiring source and load impedances of 330
Ω,
no external matching is necessary. Overall RSSI linearity is
dependent on having total midband attenuation of 10 dB (4.0
dB insertion loss plus 6.0 dB impedance matching loss) for the
filter. The output of the IF amplifier is buffered and the imped-
ance is 330
Ω.
Limiter
The limiter section is similar to the IF amplifier section
except that five stages are used with the middle three con-
tributing to the RSSI. The fixed internal input impedance is
330
Ω. The total gain of the limiting amplifier section is
approximately 84 dB. This IF limiting amplifier section inter-
nally drives the coilless quadrature detector section.
Coilless Quadrature Detector
The coilless detector is a unique design which eliminates the
conventional tunable quadrature coil in FM receiver systems.
The frequency detector implements a phase locked loop with a
fully integrated on chip relaxation oscillator which is current
controlled and externally adjusted, a bandwidth adjust, and an
automatic frequency tuning circuit. The loop filter is external
to the chip allowing the user to set the loop dynamics. Two
outputs are used: one to deliver the audio signal (detector out-
put) and the other to filter and tune the detector (AFT).
LANSDALE Semiconductor, Inc.
ML13145
25
–14
LO POWER (dBm)
VCC = 3.6 Vdc
TA = 25°C
PRF = –25 dBm
Lim Adj Current = 0
Figure 2. 2nd Mixer NF & Gain
versus LO Power
–9.0
–4.0
–1.0
6.0
11
20
15
10
5.0
0
–2.0
–4.0
–6.0
–8.0
–10
–12
NF
Gain


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