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74LVC2G14GF Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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74LVC2G14GF Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 74LVC2G14_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 September 2007 3 of 17 NXP Semiconductors 74LVC2G14 Dual inverting Schmitt trigger with 5 V tolerant input 7. Pinning information 7.1 Pinning 7.2 Pin description 8. Functional description [1] H = HIGH voltage level; L = LOW voltage level. Fig 4. Pin configuration SOT363 and SOT457 Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891 74LVC2G14 1A 1Y GND 2A 2Y 001aab672 1 2 3 6 VCC 5 4 74LVC2G14 GND 001aab673 1A 2A VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 74LVC2G14 GND 001aaf957 1A 2A VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data input Table 4. Function table[1] Input Output nA nY LH HL |
Podobny numer części - 74LVC2G14GF |
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Podobny opis - 74LVC2G14GF |
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