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SN74CBTLV16210GR Arkusz danych(PDF) 1 Page - Texas Instruments |
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SN74CBTLV16210GR Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 11 page SN74CBTLV16210 LOW VOLTAGE 20BIT FET BUS SWITCH SCDS042J − DECEMBER 1997 − REVISED JULY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Member of the Texas Instruments Widebus Family D 5-Ω Switch Connection Between Two Ports D Rail-to-Rail Switching on Data I/O Ports D Ioff Supports Partial-Power-Down Mode Operation description/ordering information The SN74CBTLV16210 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as dual 10-bit bus switches with separate output-enable (OE) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP − DL Tube SN74CBTLV16210DL CBTLV16210 −40 °C to 85°C SSOP − DL Tape and reel SN74CBTLV16210DLR CBTLV16210 −40 C to 85 C TVSOP − DGV Tape and reel SN74CBTLV16210VR CN210 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each 10-bit bus switch) INPUT OE FUNCTION L A port = B port H Disconnect PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2004, Texas Instruments Incorporated DGV OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC 1A1 1A2 1A3 1A4 1A5 1A6 GND 1A7 1A8 1A9 1A10 2A1 2A2 VCC 2A3 GND 2A4 2A5 2A6 2A7 2A8 2A9 2A10 1OE 2OE 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1B9 1B10 2B1 2B2 2B3 GND 2B4 2B5 2B6 2B7 2B8 2B9 2B10 NC − No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. |
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