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TC9WMA2FK Arkusz danych(PDF) 3 Page - Toshiba Semiconductor |
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TC9WMA2FK Arkusz danych(HTML) 3 Page - Toshiba Semiconductor |
3 / 15 page TC9WMA2FK 2007-10-19 3 Functional Description 1. Types of Instructions Command Operation Address C0 C1 C2 C3 Data Read A0~A7 1 0 0 0 0 0 0 0 Program A0~A7 0 1 1 0 0 0 0 0 D0~D7 All erase ******** 0 011 00 0 0 Busy monitor ******** 1 011 00 0 0 Overwrite enable ******** 1 001 00 0 0 Overwrite disable ******** 1 101 00 0 0 Read Auto-incremented A0~A7 1 0 0 0 1 0 0 0 *: Don’t care 2. Operation Method Be sure to drive CS and CLK high temporarily before entering an instruction. After CS is asserted low, CLK becomes effective, acting as a serial transfer synchronizing signal. The data on DI is latched on a rising edge of CLK , while data is output to DO on a falling edge of CLK . Instructions can only be executed when the chip is not being programmed or collectively erased (i.e., when the ready/busy status signal is high). However, the Monitor Busy instruction can be entered at any time. Only the commands listed in the above table can be used. Do not use any other command. • Read Entering the Read instruction causes memory data at the specified address to be read out and serially output from the DO pin. • Program Entering the Program instruction causes overwrite operation to automatically start within the chip, overwriting memory data at the specified address with the input data. After the instruction is entered, CS can be driven high even while overwrite operation is still in progress internally. • All Erase Entering the Erase All instruction causes erase operation to automatically start within the chip, erasing memory data at all addresses. After the instruction is entered, CS can be driven high even while erase operation is still in progress internally. This command clears the memory data to 0. • Busy Monitor Entering the Monitor Busy instruction causes a ready/busy status signal to be output from the DO pin. This output signal is low while the chip is being programmed or collectively erased, and is high after programming or collective erase operation is completed. The ready/busy status signal is output continuously until CS is driven high. • Overwrite Enable/Disable Entering the Enable Overwrite instruction places the chip in overwrite enabled mode, where the Program and Erase All instructions can be entered. Entering the Disable Overwrite instruction places the chip in overwrite disabled mode, where the Program and Erase All instructions cannot be entered. Once the chip is placed in overwrite disabled mode, it remains disabled against overwriting until the Enable Overwrite instruction is entered. • Read Auto-incremented After the data at the specified address is output, the subsequent CLK pulse causes the address to be incremented so that the data at the next address is output automatically. After the data at the last address is output, that at the first address will be read and output. |
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