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ADIS16209 Datasheet(Arkusz danych) 5 Page - Analog Devices

Numer części ADIS16209
Szczegółowy opis  High-Accuracy, Dual-Axis Digital Inclinometer and Accelerometer
Pobierz  16 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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Preliminary Technical Data
ADIS16209
Rev. PrA | Page 5 of 16
TIMING SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, tilt = 0°, unless otherwise noted.
Table 2.
Parameter
Description
Min1
Typ
Max
Unit
fSCLK
Fast mode, SMPL_PRD ≤ 0x07 (fs ≥ 1024 Hz)
0.01
2.5
MHz
Normal mode, SMPL_PRD ≥ 0x08 (fs ≤ 910 Hz)
0.01
1.0
MHz
tDATARATE
Chip select period, fast mode, SMPL_PRD ≤ 0x07 (fs ≥ 1024 Hz)
40
μs
tDATARATE
Chip select period, normal mode, SMPL_PRD ≥ 0x08 (fs ≤ 910 Hz)
100
μs
tCS
Chip select to clock edge
48.8
ns
tDAV
Data output valid after SCLK edge
100
ns
tDSU
Data input setup time before SCLK rising edge
24.4
ns
tDHD
Data input hold time after SCLK rising edge
48.8
ns
tDF
Data output fall time
5
12.5
ns
tDR
Data output rise time
5
12.5
ns
tSFS
CS high after SCLK edge
5
ns
1 Guaranteed by design, not tested.
TIMING DIAGRAMS
CS
SCLK
tDATARATE
tSTALL = tDATA RATE – 16/fSCLK
tSTALL
Figure 2. SPI Chip Select Timing
CS
SCLK
DOUT
DIN
1
2
3
4
5
6
15
16
W/R
A5
A4
A3
A2
D2
MSB
DB14
D1
LSB
DB13
DB12
DB10
DB11
DB2
LSB
DB1
tCS
tSFS
tDAV
tDHD
tDSU
Figure 3. SPI Timing
(Utilizing SPI Settings Typically Identified as Phase = 1, Polarity = 1)
CS
SCLK
DIN
W/R
A5
A4
A3
A2
A1
A0
DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
DATA FRAME
WRITE = 1
READ = 0
REGISTER ADDRESS
DATA FOR WRITE COMMANDS
DON’T CARE FOR READ COMMANDS
Figure 4. DIN Bit Sequence




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