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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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TC9349AFG Arkusz danych(PDF) 10 Page - Toshiba Semiconductor |
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TC9349AFG Arkusz danych(HTML) 10 Page - Toshiba Semiconductor |
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10 / 129 page  TC9349AFG 2006-02-24 10 PIN No. Symbol Pin Name Function and Operation Remarks 49 IFin/IN IF signal input /Input port IF signal input pin. The input frequency is between 0.03 and 12 MHz. A built-in input amp and C coupling allow small-amplitude operation. The IF counter can store 20-bit data in memory. In Manual mode, gate On/Off control can be performed using an instruction. The input pin is used as an input port (IN port). In this case, the pin is for CMOS input, so that input clocks can be counted using the IF counter. Note: When a pin is set to IF input, the input is at high impedance in PLL-off mode. Note: Since the VPLL power supply is used in this circuit, an input state cannot be read when the VPLL power supply is in the OFF state. 50 VPLL 52 GND (PLL) PLL Power supply pin Pin to which power is applied for the PLL prescaler. Normally, the supply voltage to be applied is from 0.9 to 1.8 V. Current dissipation becomes low in PLL-off mode. Usually, the pin is connected to the VDD 51 OSCin Local oscillation signal input Programmable counter input pin. It is possible to select the pulse-swallow type (HF mode) or the direct divide type (LF mode) through programming. The local oscillation output of 1 to 30 MHz is input in the HF mode; 0.5 to 4 MHz in the LF mode. A built-in input amp and C coupling allow small-amplitude operation. Note: The input is at high impedance in PLL-off mode. Rfin2 Input instruction VPLL VPLL VPLL Rfin1 VPLL |
Podobny numer części - TC9349AFG |
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Podobny opis - TC9349AFG |
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