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ADM560JR Arkusz danych(PDF) 8 Page - Analog Devices |
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ADM560JR Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 12 page ADM560/ADM561 Rev. B | Page 8 of 12 THEORY OF OPERATION The ADM560/ADM561 are RS-232 transmission line drivers/ receivers, and operate from a single +3.3 V supply. This is achieved by integrating step-up voltage converters and level shifting trans- mitters and receivers onto the same chip. CMOS technology is used to keep the power dissipation at an absolute minimum. The ADM560/ADM561 are a modification, enhancement, and improvement to the ADM241L family and its derivatives thereof. These devices are essentially plug-in compatible and do not have materially different applications. The ADM560/ADM561 contain an internal voltage doubler and a voltage inverter that generates ±6.6 V from the +3.3 V input. Four external 1 μF capacitors are required for the inter- nal voltage converters. CIRCUIT DESCRIPTION The internal circuitry consists of three main sections. These are as follows: • A charge pump voltage converter. • 3 V logic to EIA-232 transmitters. • EIA-232 to 3 V logic receivers. Charge Pump DC-to-DC Voltage Converter The charge pump voltage converter consists of an oscillator and a switching matrix. The converter generates a ±6.6 V supply from the input +3.3 V level. This is done in two stages using a switched capacitor technique (see Figure 11 and Figure 12). First, the +3.3 V input supply is doubled to +6.6 V using Capacitor C1 as the charge storage element. The +6.6 V level is then inverted to generate −6.6 V using Capacitor C2 as the storage element. Capacitor C3 and Capacitor C4 are used to reduce the output ripple. Their values are not critical and can be reduced if higher levels of ripple are acceptable. The C1 and C2 charge pump capac- itors can also be reduced at the expense of the higher output impedance on the V+ and V− supplies. The V+ and V− supplies are also used to power external circuitry if the current requirements are small. Transmitter (Driver) Section The drivers convert 3 V or 5 V logic input levels into EIA-232 output levels. With VCC = +3.3 V and driving an EIA-232 load, the output voltage swing is typically ±5.5 V. + C3 + C1 VCC GND S1 S2 S3 S4 INTERNAL OSCILLATOR V+ = 2VCC VCC Figure 11. Charge Pump Voltage Double Operation + C4 + C2 V+ GND S1 S2 S3 S4 INTERNAL OSCILLATOR GND V– = – (V+) FROM VOLTAGE DOUBLER Figure 12. Charge Pump Voltage Inverted Operation Unused inputs can be left unconnected as an internal 400 kΩ pull-up resistor pulls them high forcing the outputs into a low state. The input pull-up resistors typically source 8 μA when grounded, so connect unused inputs to VCC or leave unconnec- ted in order to minimize power consumption. Receiver Section The receivers are inverting level shifters; they accept EIA-232 input levels and translate them into 3 V logic output levels. The inputs have internal 5 kΩ pull-down resistors to ground and are also protected against overvoltages of up to ±25 V. The guaranteed switching thresholds are 0.4 V minimum and 2.4 V maximum. Unconnected inputs are pulled to 0 V by the internal 5 kΩ pull- down resistor. This results in a Logic 1 output level for unconnected inputs or for inputs connected to GND. The receivers have a Schmitt trigger input with a hysteresis level of 0.3 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times. ENABLE AND SHUTDOWN Table 4 shows the truth table for the enable and shutdown control signals. When disabled all receivers are placed in a high impedance state. In shutdown, all transmitters are disa- bled and all receivers on the ADM561 are disabled. On the ADM560, Receiver R4 and Receiver R5 remain enabled in shutdown. |
Podobny numer części - ADM560JR |
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Podobny opis - ADM560JR |
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