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Zakładka z wyszukiwarką danych komponentów |
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ADS5287IRGCR Arkusz danych(PDF) 10 Page - Texas Instruments |
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ADS5287IRGCR Arkusz danych(HTML) 10 Page - Texas Instruments |
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10 / 31 page  www.ti.com 0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 Sample n Sample n+12 t PROP t (A) D 12clockslatency AnalogInput ClockInput 6XADCLK LCLK N LCLK P 1XADCLK ADCLK N ADCLK P SERIAL DATA OUT P OUT N t SAMPLE Sample n+13 t H1 t SU1 t H2 t SU2 LCLK N LCLK P OUT N OUT P TIMING CHARACTERISTICS (1) ADS5287 SBAS428 – JANUARY 2008 LVDS TIMING DIAGRAM DEFINITION OF SETUP AND HOLD TIMES tSU = min(tSU1, tSU2) tH = min(tH1, tH2) ADS5287 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tA Aperture delay 1.5 4.5 ns Aperture delay variation Channel-to-channel within the same device (3 σ) ±20 ps tJ Aperture jitter 400 fs Time to valid data after coming out of 50 µs COMPLETE POWER-DOWN mode Time to valid data after coming out of PARTIAL tWAKE Wake-up time POWER-DOWN mode (with clock continuing to 2 µs run during power-down) Time to valid data after stopping and restarting 40 µs the input clock Clock Data latency 12 cycles (1) Timing parameters are ensured by design and characterization; not production tested. 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS5287 |
Podobny numer części - ADS5287IRGCR |
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