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ADC12040EVAL Arkusz danych(PDF) 3 Page - National Semiconductor (TI) |
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ADC12040EVAL Arkusz danych(HTML) 3 Page - National Semiconductor (TI) |
3 / 19 page Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description ANALOG I/O 2V IN+ Non-Inverting analog signal Input. 3V IN− Inverting analog signal Input. This pin may be connected to V CM for single-ended operation, but a differential input signal is required for best performance. 1V REF Reference input. This pin should be bypassed to ground with a 0.1 µF monolithic capacitor. 31 V RP These pins are high impedance reference bypass pins only. Connect a 0.1 µF capacitor from each of these pins to AGND. DO NOT connect anything else to these pins. 32 V RM 30 V RN DIGITAL I/O 10 CLK Digital clock input. The input is sampled on the rising edge of CLK. 11 OE OE is the output enable pin that, when low, enables the TRI-STATE™ data output pins. When this pin is high, the outputs are in a high impedance state. 8PD PD is the Power Down input pin. When high, this input puts the converter into the power down mode. When this pin is low, the converter is in the active mode. www.national.com 3 |
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