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AD549KH Arkusz danych(PDF) 10 Page - Analog Devices |
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AD549KH Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 20 page AD549 Rev. H | Page 10 of 20 FUNCTIONAL DESCRIPTION MINIMIZING INPUT CURRENT The AD549 is optimized for low input current and offset voltage. Careful attention to how the amplifier is used reduces input currents in actual applications. Keep the amplifier operating temperature as low as possible to minimize input current. Like other JFET input amplifiers, the AD549 input current is sensitive to chip temperature, rising by a factor of 2.3 for every 10°C. Figure 25 is a plot of the AD549 input current vs. ambient temperature. 1nA 100pA 10pA 1pA 100fA 10fA 1fA –55 –25 5 35 65 125 95 TEMPERATURE (°C) Figure 25. Input Bias Current vs. Ambient Temperature On-chip power dissipation raises the chip operating tempera- ture, causing an increase in input bias current. Due to the low quiescent supply current of the AD549, the chip temperature is less than 3°C higher than its ambient temperature when the (unloaded) amplifier is operating with 15 V supplies. The difference in the input current is negligible. However, heavy output loads can cause a significant increase in chip temperature and a corresponding increase in the input current. Maintaining a minimum load resistance of 10 Ω is recommended. Input current vs. additional power dissipation due to output drive current is plotted in Figure 26. 6 5 4 3 2 1 0 25 50 75 100 125 150 175 200 ADDITIONAL INTERNAL POWER DISSIPATION (mW) BASED ON TYPICAL IB = 40fA Figure 26. Input Bias Current vs. Additional Power Dissipation CIRCUIT BOARD NOTES A number of physical phenomena generate spurious currents that degrade the accuracy of low current measurements. Figure 27 is a schematic of a current to voltage (I-to-V) converter with these parasitic currents modeled. 2 3 6 8 AD549 + VOUT – fS CF RF VS RP CP II' = +V + CP V RP dCP dT dV dT Figure 27. Sources of Parasitic Leakage Currents Finite resistance from input lines to voltages on the board, modeled by Resistor RP, results in parasitic leakage. Insulation resistance of more than 1015 Ω must be maintained between the amplifier signal and supply lines to capitalize on the low input currents of the AD549. Standard PCB material does not have high enough insulation resistance; therefore, connect the input leads of the AD549 to standoffs made of insulating material with adequate volume resistivity (that is, Teflon®). The surface of the insulator must be kept clean to preserve surface resistivity. For Teflon, an effective cleaning procedure consists of swabbing the surface with high grade isopropyl alcohol, rinsing with deionized water, and baking the board at 80°C for 10 minutes. In addition to high volume and surface resistivity, other proper- ties are desirable in the insulating material chosen. Resistance to water absorption is important because surface water films drastically reduce surface resistivity. The insulator chosen should also exhibit minimal piezoelectric effects (charge emission due to mechanical stress) and triboelectric effects (charge generated by friction). Charge imbalances generated by these mechanisms can appear as parasitic leakage currents. These effects are modeled by Variable Capacitor CP in Figure 27. Table 3 lists various insulators and their properties.1 Guarding the input lines by completely surrounding them with a metal conductor biased near the potential of the input lines has two major benefits. First, parasitic leakage from the signal line is reduced because the voltage between the input line and the guard is very low. Second, stray capacitance at the input node is minimized. Input capacitance can substantially degrade signal bandwidth and the stability of the I-to-V converter. 1 Electronic Measurements, pp. 15–17, Keithley Instruments, Inc., Cleveland, Ohio, 1977. |
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