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Electrical Characteristics for 3.3-V Supply

(1)

TS3DS26227

HIGH-BANDWIDTH DUAL-SPDT DIFFERENTIAL SIGNAL SWITCH

WITH INPUT LOGIC TRANSLATION

SCDS234 – SEPTEMBER 2006

V

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX UNIT

Analog Switch

Analog signal range

0

Ω

25

°C

3.5

5

0

≤ (V

Switch ON,

ON-state resistance

2.7 V

Ω

See Figure 13

Full

6

25

°C

0.05

0.1

ON-state resistance

Switch ON,

∆r

on

2.7 V

Ω

match between channels

See Figure 13

Full

0.2

25

°C

2

3

ON-state resistance

0

≤ (V

Switch ON,

2.7 V

Ω

flatness

See Figure 13

Full

4

25

°C

–5

0.1

5

NC, NO

Switch OFF,

or

3.6 V

nA

OFF leakage current

See Figure 14

Full

–15

15

25

°C

–10

0.2

10

NC, NO

Switch ON,

or

3.6 V

nA

ON leakage current

See Figure 15

Full

–30

30

25

°C

–10

0.2

10

COM

Switch ON,

or

3.6 V

nA

ON leakage current

See Figure 15

Full

–30

30

0.65

Input logic high

Full

V

× V

IO

0.35

Input logic low

Full

0

V

× V

IO

25

°C

–2

0.1

2

Input leakage current

3.6 V

nA

Full

–10

10

(1)

The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum

(2)

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

4

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