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M27V320-150M6 Arkusz danych(PDF) 10 Page - STMicroelectronics |
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M27V320-150M6 Arkusz danych(HTML) 10 Page - STMicroelectronics |
10 / 15 page M27V320 10/15 PRESTO III Programming Algorithm The PRESTO III Programming Algorithm allows the whole array to be programed with a guaran- teed margin in a typical time of 100 seconds. Pro- gramming with PRESTO III consists of applying a sequence of 50µs program pulses to each word until a correct verify occurs (see Figure 11). During programing and verify operation a MARGIN MODE circuit must be activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell. Program Inhibit Programming of multiple M27V320s in parallel with different data is also easily accomplished. Ex- cept for E, all like inputs including GVPP of the par- allel M27V320 may be common. A TTL low level pulse applied to a M27V320's E input and VPP at 12V, will program that M27V320. A high level E in- put inhibits the other M27V320s from being pro- grammed. Program Verify A verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. The verify is accomplished with GVPP at VIL. Data should be verified with tELQV af- ter the falling edge of E. Figure 10. Programming and Verify Modes AC Waveforms Note: BYTE = VIH; GVPP High level = 12V. tAVEL VALID AI02205 A0-A20 Q0-Q15 VCC DATA IN DATA OUT E tQVEL tVCHEL tVPHEL tEHQX tEHVPX tELQV tELEH tEHQZ tVPLEL PROGRAM VERIFY GVPP tEHAX Figure 11. Programming Flowchart AI05820 n = 0 Last Addr VERIFY E = 50 µs Pulse ++n = 25 ++ Addr VCC = 6.25V, VPP = 12V FAIL CHECK ALL WORDS BYTE = VIH 1st: VCC = 5V 2nd: VCC = 3V YES NO YES NO YES NO SET MARGIN MODE RESET MARGIN MODE |
Podobny numer części - M27V320-150M6 |
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Podobny opis - M27V320-150M6 |
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