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M40Z111W Arkusz danych(PDF) 9 Page - STMicroelectronics

Numer części M40Z111W
Szczegółowy opis  5V OR 3V NVRAM SUPERVISOR FOR UP TO TWO LPSRAMs
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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M40Z111, M40Z111W
Table 6. Power Down/Up AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after VCC
passes VPFD (min).
3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.
4. tER (min) = 20ms for Industrial Temperature Range - Grade 6 device.
VCC Noise And Negative Going Transients
ICC transients, including those produced by output
switching, can produce voltage fluctuations, re-
sulting inspikes onthe VCC bus. These transients
can be reduced if capacitors are used to store en-
ergy which stabilizes the VCC bus. The energy
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1µF (as shown in Figure
8) is recommended in order to provide the needed
filtering.
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on VCC that drive it to values
below VSS by as much as one volt. These negative
spikes can cause data corruption in the SRAM
while in battery backup mode. To protect from
these voltage spikes, STMicroelectronics recom-
mends connecting a schottky diode from VCC to
VSS (cathode connected to VCC, anode to VSS).
Schottky diode 1N5817 is recommended for
through hole and MBRS120T3 is recommended
for surface mount.
Figure 8. Supply Voltage Protection
Symbol
Parameter(1)
Min
Max
Unit
tF
(2)
VPFD (max) to VPFD (min) VCC Fall Time
300
µs
tFB
(3)
VPFD (min) to VSS VCC Fall Time
10
µs
tR
VPFD (min) to VPFD (max) VCC Rise Time
10
µs
tRB
VSS to VPFD (min) VCC Rise Time
1µs
tEDL
Chip Enable Propagation Delay
M40Z111
15
ns
M40Z111W
20
ns
tEDH
Chip Enable Propagation Delay
M40Z111
10
ns
M40Z111W
20
ns
tER
(4)
Chip Enable Recovery
40
200
ms
tWPT
Write Protect Time
M40Z111
40
150
µs
M40Z111W
40
250
µs
AI00622
VCC
0.1
µF
DEVICE
VCC
VSS


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