SN74ALS166

PARALLEL-LOAD 8-BIT SHIFT REGISTER

SDAS156D – APRIL 1982 – REVISED AUGUST 2000

3

POST OFFICE BOX 655303

typical clear, shift, load, inhibit, and shift sequences

Clear

Load

Inhibit

H

H

H

H

H

H

H

HHH

L

L

L

L

L

L

CLK

CLK INH

SER

A

B

C

D

E

F

G

H

SH/LD

CLR

QH

Parallel

Inputs

Serial Shift

Serial Shift

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

73

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package

82

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package

67

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.5

5

5.5

V

VIH

High-level input voltage

2

V

VIL

Low-level input voltage

0.8

V

IOH

High-level output current

–0.4

mA

IOL

Low-level output current

8

mA

TA

Operating free-air temperature

0

70

°C