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M27C256B-90C7X Arkusz danych(PDF) 6 Page - STMicroelectronics

Numer części M27C256B-90C7X
Szczegółowy opis  256 Kbit (32Kb x 8) UV EPROM and OTP EPROM
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27C256B-90C7X Arkusz danych(HTML) 6 Page - STMicroelectronics

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Figure 5. Read Mode AC Waveforms
AI00758B
tAXQX
tEHQZ
A0-A14
E
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Symbol
Alt
Parameter
Test Condition
M27C256B
Unit
-90
-10
-12
-15/-20/-25
Min
Max
Min
Max
Min
Max
Min
Max
tAVQV
tACC
Address Valid to
Output Valid
E = VIL, G = VIL
90
100
120
150
ns
tELQV
tCE
Chip Enable Low to
Output Valid
G = VIL
90
100
120
150
ns
tGLQV
tOE
Output Enable Low to
Output Valid
E = VIL
40
50
60
65
ns
tEHQZ
(2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
0
300
30
040
0
50
ns
tGHQZ
(2)
tDF
Output Enable High
to Output Hi-Z
E = VIL
0
300
30
040
0
50
ns
tAXQX
tOH
Address Transition to
Output Transition
E = VIL, G = VIL
0000
ns
System Considerations
The power switching characteristics of Advance
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
this transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.


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