ADS5560 datasheet(11/53 Pages) TI

Numer części	ADS5560

Szczegółowy opis	16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS

Download	53 Pages

Scroll/Zoom	100%

Producent	TI [Texas Instruments]

Strona internetowa	http://www.ti.com

Logo

11 / 53 page

DEVICE PROGRAMMING MODES

USING PARALLEL INTERFACE CONTROL ONLY

USING SERIAL INTERFACE PROGRAMMING ONLY

USING BOTH SERIAL INTERFACE AND PARALLEL CONTROLS

ADS5560

ADS5562

www.ti.com ....................................................................................................................................................................................................... SLWS207 – MAY 2008

ADS5562 offers flexibility with several programmable features that are easily configured.

The device can be configured independently using either parallel interface control or serial interface

programming.

In addition, the device supports a third configuration mode, where both the parallel interface and the serial control

registers are used. In this mode, the priority between the parallel and serial interfaces is determined by a priority

table (Table 3). If this additional level of flexibility is not required, the user can select either the serial interface

programming or the parallel interface control.

To control the device using parallel interface, keep RESET tied to high (DRVDD). Pins DFS, MODE, SEN,

SCLK, and SDATA are used to directly control certain modes of the ADC. The device is configured by

connecting the parallel pins to the correct voltage levels (as described in Table 4 to Table 8). There is no need to

apply reset.

In this mode, SEN, SCLK, and SDATA function as parallel interface control pins. Frequently used functions are

controlled in this mode—standby, selection between LVDS/CMOS output format, internal/external reference,

two's complement/offset binary output format, and position of the output clock edge.

Table 2 has a description of the modes controlled by the parallel pins.

Table 2. Parallel Pin Definition

CONTROL MODES

DFS

DATA FORMAT and the LVDS/CMOS output interface

MODE

Internal or external reference

SEN

CLKOUT edge programmability

SCLK

LOW SPEED mode control for low sampling frequencies (

≤ 30 MSPS)

SDATA

STANDBY mode – Global (ADC, internal references and output buffers are powered down)

To program using the serial interface, the internal registers must first be reset to their default values, and the

RESET pin must be kept low. In this mode, SEN, SDATA, and SCLK function as serial interface pins and are

used to access the internal registers of ADC. The registers are reset either by applying a pulse on the RESET

pin, or by a high setting on the <RST> bit (D1 in register 0x6C). The serial interface section describes the

register programming and register reset in more detail.

Since the parallel pins DFS and MODE are not used in this mode, they must be tied to ground.

For increased flexibility, a combination of serial interface registers and parallel pin controls (DFS, MODE) can

also be used to configure the device.

The serial registers must first be reset to their default values and the RESET pin must be kept low. In this mode,

SEN, SDATA, and SCLK function as serial interface pins and are used to access the internal registers of ADC.

The registers are reset either by applying a pulse on RESET pin or by a high setting on the <RST> bit (D1 in

register 0x6C). The serial interface section describes the register programming and register reset in more detail.

The parallel interface control pins DFS and MODE are used and their function is determined by the appropriate

voltage levels as described in Table 7 and Table 8. The voltage levels are derived by using a resistor string as

illustrated in Figure 5. Since some functions are controlled using both the parallel pins and serial registers, the

priority between the two is determined by a priority table (Table 3).

Submit Documentation Feedback

11

Product Folder Link(s): ADS5560 ADS5562

Podobny numer części - ADS5560

Producent	Numer części	Arkusz danych	Szczegółowy opis
Texas Instruments	ADS5560	1Mb / 56P	[Old version datasheet] 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
	ADS5560	1Mb / 61P	[Old version datasheet] MSPS ADCs With DDR LVDS and CMOS Outputs
	ADS5560EVM	1Mb / 56P	[Old version datasheet] 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
	ADS5560IRGZR	1Mb / 56P	[Old version datasheet] 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
	ADS5560IRGZT	1Mb / 56P	[Old version datasheet] 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS

More results

Podobny opis - ADS5560

Producent	Numer części	Arkusz danych	Szczegółowy opis
Texas Instruments	ADS5560EVM	1Mb / 56P	[Old version datasheet] 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
	ADS5560	1Mb / 61P	[Old version datasheet] MSPS ADCs With DDR LVDS and CMOS Outputs
	ADS6149	2Mb / 68P	[Old version datasheet] 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs
	ADS6149	2Mb / 71P	[Old version datasheet] 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs
	ADS6149	2Mb / 69P	[Old version datasheet] 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs
	ADS6149	2Mb / 70P	[Old version datasheet] 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs
Renesas Technology Corp	ADC1610S	357Kb / 38P	Single 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs 2 July 2012
NXP Semiconductors	ADC1610S	287Kb / 38P	Single 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs Rev. 02-12 April 2010
Integrated Device Techn...	ADC1610S	353Kb / 38P	Single 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
Texas Instruments	ADS5525	806Kb / 48P	[Old version datasheet] 12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

More results

ADS5560 Arkusz danych(PDF) 11 Page - Texas Instruments

ADS5560 Arkusz danych(HTML) 11 Page - Texas Instruments

Podobny numer części - ADS5560

Podobny opis - ADS5560

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

Arkusz danych Pobierz

Link URL