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M74HC4028C1R Arkusz danych(PDF) 1 Page - STMicroelectronics |
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M74HC4028C1R Arkusz danych(HTML) 1 Page - STMicroelectronics |
1 / 10 page M54HC4028 M74HC4028 October 1992 BCD TO DECIMAL DECODER B1R (Plastic Package) ORDER CODES : M54HC4028F1R M74HC4028M1R M74HC4028B1R M74HC4028C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection DESCRIPTION . HIGH SPEED tPD = 18 ns (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =4 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE |IOH|= IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 4028B The M54/74HC4028 is a high speed CMOS BCD- TO-DECIMAL DECODER fabricated in silicon gate C 2MOS technology. It has the same high speed per- formance of LSTTL combined with true CMOS low power consumption. A BCD code applied to the four inputs (A to D) provides a high level at the selected one of the decimal decoded outputs. An illegal BCD code such as eleven to fifteen gives a low level at all outputs. The device also can be used as 3-TO- 8-LINE DECODER, when D input is assigned as a disable input. The device is useful for code conver- sion, address decoding, memory selection, demulti- plexing, or read out decoding. All inputs are equipped with protection circuits against static discharge and transient excess volt- age. 1/10 |
Podobny numer części - M74HC4028C1R |
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Podobny opis - M74HC4028C1R |
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