SN54LVTH374, SN74LVTH374

3.3V ABT OCTAL EDGETRIGGERED DTYPE FLIPFLOPS

WITH 3STATE OUTPUTS

SCBS683H − MARCH 1997 − REVISED OCTOBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without need for interface or pullup components.

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE

CLK

D

OUTPUT

Q

L

↑

H

H

L

↑

LL

L

H or L

X

Q0

H

X

X

Z

logic diagram (positive logic)

OE

To Seven Other Channels

1

11

3

2

CLK

1D

C1

1D

1Q