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3.0 I2S INPUT INTERFACE CONFIGURATION

In order to configure the I2S input interface the

I2SI_Align_x bits one of 6 configuration mode can be selected. Following is a table describing each one of them.

I2SI_LRCK_Pol = 0 with some register)

3.1 Switching characteristics (10 pf load; Fsm=32 KHz to 96KHz):

Figure 2.

MODE

# of SLOTS

W. LENGHT

ALIGNMENT

DELAY SLOT

NOTES

0

32

24

Left

No

1

32

24

Left

Yes

2

32

16

Right

No

MSb first only

3

32

24

Right

No

4

24

24

Left

No

Slave only

5

Not valid

Not valid

Not valid

Not valid

Reserved, do not use.

6

24

16

Right

No

MSb first only. Slave only

7

24

24

Right

No

Slave only

BICKI frequency (master mode):

(slave mode):

3.072MHz

Max 6.4 MHz

min 40 ns.

min 40 ns.

min 20 ns.

min 20 ns.

min 20 ns.

min 20 ns.

D00AU1244

LRCKI

BICKI

SDI