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ADXL180WCPZ-RL1 Arkusz danych(PDF) 12 Page - Analog Devices |
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ADXL180WCPZ-RL1 Arkusz danych(HTML) 12 Page - Analog Devices |
12 / 56 page ADXL180 Rev. 0 | Page 12 of 56 User-Programmed Configuration At each of these previously described points in the system, the ADXL180 is highly configurable for different applications. The organization and configurable items are briefly described in this section but are covered in depth in the remainder of this data sheet. Physical Layer (ISO Layer 1) The bus interface hardware definition including the phase of Manchester encoding and synchronization pulse enable/disable. Data Link Layer (ISO Layer 2) The specifics of the data frame format including the data width (8-bit or 10-bit data), state vector (enable/disable), and error detection (parity or CRC). Application Layer (ISO Layer 7) The serial number and configuration data transmission mode and self-test (internal self-test pass/fail discrimination or external self-test data evaluation). Other signal processing related aspects of the function of the ADXL180 can also be configured as follows: • Sensor scale factor (range) • Signal chain low-pass filter bandwidth • Auto-zero: enable/disable • User-defined data in the user data register |
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