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LAXP2-5E-5FTN256E Arkusz danych(PDF) 2 Page - Lattice Semiconductor |
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LAXP2-5E-5FTN256E Arkusz danych(HTML) 2 Page - Lattice Semiconductor |
2 / 83 page www.latticesemi.com 1-1 DS1024 Introduction_01.0 June 2008 Data Sheet DS1024 © 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. Features ■ flexiFLASH™ Architecture • Instant-on • Infinitely reconfigurable • Single chip • FlashBAK™ technology • Serial TAG memory • Design security ■ AEC-Q100 Tested and Qualified ■ Live Update Technology • TransFR™ technology • Secure updates with 128 bit AES encryption • Dual-boot with external SPI ■ sysDSP™ Block • Three to five blocks for high performance Multiply and Accumulate • 12 to 20 18x18 multipliers • Each block supports one 36x36 multiplier or four 18x18 or eight 9x9 multipliers ■ Embedded and Distributed Memory • Up to 276 Kbits sysMEM™ EBR • Up to 35 Kbits Distributed RAM ■ sysCLOCK™ PLLs • Up to four analog PLLs per device • Clock multiply, divide and phase shifting ■ Flexible I/O Buffer • sysIO™ buffer supports: – LVCMOS 33/25/18/15/12; LVTTL – SSTL 33/25/18 class I, II – HSTL15 class I; HSTL18 class I, II – PCI – LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS ■ Pre-engineered Source Synchronous Interfaces • DDR / DDR2 interfaces up to 200 MHz • 7:1 LVDS interfaces support display applications • XGMII ■ Density And Package Options • 5k to 17k LUT4s, 86 to 358 I/Os • TQFP, PQFP and ftBGA packages • Density migration supported ■ Flexible Device Configuration • SPI (master and slave) Boot Flash Interface • Dual Boot Image supported • Soft Error Detect (SED) macro embedded ■ System Level Support • IEEE 1149.1 and IEEE 1532 Compliant • On-chip oscillator for initialization & general use • Devices operate with 1.2V power supply Table 1-1. LA-LatticeXP2 Family Selection Guide Device LA-XP2-5 LA-XP2-8 LA-XP2-17 LUTs (K) 5 8 17 Distributed RAM (KBits) 10 18 35 EBR SRAM (KBits) 166 221 276 EBR SRAM Blocks 9 12 15 sysDSP Blocks 3 4 5 18 x 18 Multipliers 12 16 20 VCC Voltage 1.2 1.2 1.2 GPLL 2 2 4 Max Available I/O 172 201 201 Packages and I/O Combinations 144-Pin TQFP (20 x 20 mm) 100 100 208-Pin PQFP (28 x 28 mm) 146 146 146 256-Ball ftBGA (17 x17 mm) 172 201 201 LA-LatticeXP2 Family Data Sheet Introduction |
Podobny numer części - LAXP2-5E-5FTN256E |
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Podobny opis - LAXP2-5E-5FTN256E |
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