Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD7356 Arkusz danych(PDF) 10 Page - Analog Devices

Numer części AD7356
Szczegółowy opis  Differential Input, Dual, Simultaneous Sampling, 5 MSPS, 12-Bit, SAR ADC
Download  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7356 Arkusz danych(HTML) 10 Page - Analog Devices

Back Button AD7356_08 Datasheet HTML 6Page - Analog Devices AD7356_08 Datasheet HTML 7Page - Analog Devices AD7356_08 Datasheet HTML 8Page - Analog Devices AD7356_08 Datasheet HTML 9Page - Analog Devices AD7356_08 Datasheet HTML 10Page - Analog Devices AD7356_08 Datasheet HTML 11Page - Analog Devices AD7356_08 Datasheet HTML 12Page - Analog Devices AD7356_08 Datasheet HTML 13Page - Analog Devices AD7356_08 Datasheet HTML 14Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 20 page
background image
AD7356
Rev. 0 | Page 10 of 20
TERMINOLOGY
Integral Nonlinearity (INL)
INL is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale (1 LSB below
the first code transition) and full scale (1 LSB above the last
code transition).
Differential Nonlinearity (DNL)
DNL is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Negative Full-Scale Error
Negative full-scale error is the deviation of the first code
transition (00 … 000) to (00 … 001) from the ideal (that is,
−VREF + 0.5 LSB) after the midscale error has been adjusted out.
Negative Full-Scale Error Match
Negative full-scale error match is the difference in negative full-
scale error between the two ADCs.
Midscale Error
Midscale error is the deviation of the midscale code transition
(011 … 111) to (100 … 000) from the ideal (that is, 0 V).
Midscale Error Match
Midscale error match is the difference in midscale error
between the two ADCs.
Positive Full-Scale Error
Positive full-scale error is the deviation of the last code
transition (111 … 110) to (111 … 111) from the ideal (that is,
VREF − 1.5 LSB) after the midscale error has been adjusted out.
Positive Full-Scale Error Match
Positive full-scale error match is the difference in positive full-
scale error between the two ADCs.
ADC-to-ADC Isolation
ADC-to-ADC isolation is a measure of the level of crosstalk
between ADC A and ADC B. It is measured by applying a full-
scale 1 MHz sine wave signal to one of the two ADCs and
applying a full-scale signal of variable frequency to the other
ADC. The ADC-to-ADC isolation is defined as the ratio of the
power of the 1 MHz signal on the converted ADC to the power
of the noise signal on the other ADC that appears in the FFT.
The noise frequency on the unselected channel varies from
100 kHz to 2.5 MHz.
Power Supply Rejection Ratio (PSRR)
PSRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the ADC VDD supply of frequency, fS. The frequency
of the input varies from 5 kHz to 25 MHz.
PSRR (dB) = 10 log(Pf/PfS)
where:
Pf is the power at frequency, f, in the ADC output.
PfS is the power at frequency, fS, in the ADC output.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output
at full-scale frequency, f, to the power of a 100 mV p-p sine
wave applied to the common-mode voltage of VIN+ and VIN−
of frequency, fS.
CMRR (dB) = 10 log(Pf/PfS)
where:
Pf is the power at frequency (f) in the ADC output.
PfS is the power at frequency (fS) in the ADC output.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns to track mode at the end
of a conversion. The track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±0.5 LSB, after the end of a conversion.
Signal-to-(Noise and Distortion) Ratio (SINAD)
SINAD is the measured ratio of signal-to-(noise and distortion)
at the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (fS/2), excluding dc. The ratio is
dependent on the number of quantization levels in the digitiza-
tion process; the more levels, the smaller the quantization noise.
The theoretical SINAD for an ideal N-bit converter with a sine
wave input is given by
SINAD = (6.02 N + 1.76) dB
Thus, for a 12-bit converter, SINAD is 74 dB and for a 14-bit
converter, SINAD is 86 dB.


Podobny numer części - AD7356_08

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7356BRUZ AD-AD7356BRUZ Datasheet
191Kb / 18P
   Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC
Rev. PrC
AD7356BRUZ AD-AD7356BRUZ Datasheet
606Kb / 21P
   Differential Input, Dual, Simultaneous Sampling
AD7356BRUZ-500RL7 AD-AD7356BRUZ-500RL7 Datasheet
191Kb / 18P
   Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC
Rev. PrC
AD7356BRUZ-500RL7 AD-AD7356BRUZ-500RL7 Datasheet
606Kb / 21P
   Differential Input, Dual, Simultaneous Sampling
AD7356BRUZ-RL AD-AD7356BRUZ-RL Datasheet
191Kb / 18P
   Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC
Rev. PrC
More results

Podobny opis - AD7356_08

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7356 AD-AD7356_15 Datasheet
636Kb / 21P
   Differential Input, Dual, Simultaneous Sampling, 5 MSPS, 12-Bit, SAR ADC
REV. A
AD7352 AD-AD7352 Datasheet
518Kb / 20P
   Differential Input, Dual, Simultaneous Sampling, 3 MSPS, 12-Bit, SAR ADC
REV. 0
AD7352 AD-AD7352_15 Datasheet
623Kb / 21P
   Differential Input, Dual, Simultaneous Sampling, 3 MSPS, 12-Bit, SAR ADC
REV. A
AD7357 AD-AD7357 Datasheet
196Kb / 17P
   Differential Input,Dual,Simultaneous Sampling, 4.25 MSPS, 14-Bit, SAR ADC
Rev. PrD
AD7357 AD-AD7357_15 Datasheet
623Kb / 21P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
REV. B
AD7357 AD-AD7357_08 Datasheet
398Kb / 20P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
Rev. PrF
AD7357 AD-AD7357_09 Datasheet
469Kb / 20P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
REV. 0
AD7356 AD-AD7356 Datasheet
191Kb / 18P
   Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC
Rev. PrC
AD7262 AD-AD7262_17 Datasheet
881Kb / 33P
   1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC
AD7352 AD-AD7352_17 Datasheet
515Kb / 21P
   Differential Input, Dual, Simultaneous ampling, 3 MSPS, 12-Bit, SAR ADC
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com