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ADV3201ASWZ Arkusz danych(PDF) 1 Page - Analog Devices |
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ADV3201ASWZ Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 36 page 300 MHz, 32 × 32 Buffered Analog Crosspoint Switch ADV3200/ADV3201 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. FEATURES Large, 32 × 32, nonblocking switch array G = +1 (ADV3200) or G = +2 (ADV3201) operation Pin-compatible 32 × 16 versions available (ADV3202/ADV3203) Single 5 V supply, dual ±2.5 V supply, or dual ±3.3 V supply (G = +2) Serial programming of switch array 2:1 OSD insertion mux per output Input sync-tip clamp High impedance output disable allows connection of multiple devices with minimal output bus load Excellent video performance 60 MHz, 0.1 dB gain flatness 0.1% differential gain error (RL = 150 Ω) 0.1° differential phase error (RL = 150 Ω) Excellent ac performance Bandwidth: >300 MHz Slew rate: >400 V/μs Low power: 1.25 W Low all hostile crosstalk of −48 dB @ 5 MHz Reset pin allows disabling of all outputs Connected through a capacitor to ground, provides power-on reset capability 176-lead exposed pad LQFP (24 mm × 24 mm) APPLICATIONS CCTV surveillance Routing of high speed signals including Composite video (NTSC, PAL, S, SECAM) RGB and component video routing Compressed video (MPEG, Wavelet) Video conferencing FUNCTIONAL BLOCK DIAGRAM DGND DVCC VNEG VPOS DATA OUT ENABLE/ DISABLE 193-BIT SHIFT REGISTER PARALLEL LATCH 32 × 5:32 DECODERS ADV3200 (ADV3201) OUTPUT BUFFER G = +1 (G = +2) ENABLE/ BYPASS 32 193 192 1024 SYNC-TIP CLAMP SWITCH MATRIX OSD MUX 32 OUTPUTS 32 INPUTS .. . .. . .. . .. . 32 32 REFERENCE CLK DATA IN VCLAMP VREF OSD INPUTS OSD SWITCHES UPDATE CS RESET Figure 1. GENERAL DESCRIPTION The ADV3200/ADV3201 are 32 × 32 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input for ac-coupled applications and an on-screen display (OSD) insertion mux. With −48 dB of crosstalk and −80 dB isolation at 5 MHz, the ADV3200/ADV3201 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3200/ADV3201 ideal for composite video switching. The 32 independent output buffers of the ADV3200/ADV3201 can be placed into a high impedance state for paralleling cross- point outputs so that off channels present minimal loading to an output bus if building a larger array. The part is available in a gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in back-terminated load applications. A single 5 V supply, dual ±2.5 V supplies, or dual ±3.3 V supplies (G = +2) can be used while consuming only 250 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, which can accommodate daisy chaining of several devices. The ADV3200/ADV3201 are packaged in a 176-lead exposed pad LQFP (24 mm × 24 mm) and are available over the extended industrial temperature range of −40°C to +85°C. |
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