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ADXL345BCCZ-RL71 Datasheet(Arkusz danych) 11 Page - Analog Devices

Numer części ADXL345BCCZ-RL71
Szczegółowy opis  Three-Axis, ±2/4/8/16g Digital Accelerometer
Pobierz  24 Pages
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Preliminary Technical Data
ADXL345
Rev. PrA | Page 11 of 24
INTERRUPTS
The ADXL345 provides two output pins for driving interrupts:
INT1 and INT2. Each of the interrupt functions are described
in detail below. All functions can be used simultaneously, with
the only limiting feature being that some functions may need to
share interrupt pins. Interrupts are enabled by setting the
appropriate bit in the INT_ENABLE register and are mapped to
either the INT1 or INT2 pins based on the contents of the
INT_MAP register. It is recommended that interrupts be
configured with the interrupts disabled, preventing interrupts
from being accidentally triggered during configuration. This
can be done by writing a value of 0x00 to the INT_ENABLE
register.
DATA_READY
DATA_READY is set when new data is available and cleared
when no new data is available.
SINGLE_TAP
SINGLE_TAP is set when single acceleration event that is
greater than the value in the THRESH_TAP register occurs for
a time shorter than specified in the DUR register.
DOUBLE_TAP
DOUBLE_TAP is set when two acceleration events that are
greater than the value in the THRESH_TAP register occur that
are shorter than the time specified in the DUR register, with the
second tap starting after the time specified by the LATENT
register and within the time specified in the WINDOW
register. See the Tap Detection description in the Application
section for more details.
ACTIVITY
ACTIVITY is set when acceleration greater than the value
stored in THRESH_ACT is experienced.
INACTIVITY
INACTIVITY is set when acceleration of less than the value
stored in the THRESH_INACT register is experienced for
longer than the time specified in the TIME_INACT register.
The maximum value for TIME_INACT is 255 s.
FREE_FALL
FREE_FALL is set when acceleration of less than the value
stored in the THRESH_FF register is experienced for longer
than the time specified in the TIME_FF register. The
FREE_FALL interrupt differs from INACTIVITY interrupt in
that all axes always participate, the timer period is much smaller
(1.28 s maximum) and it is always DC coupled.
WATERMARK
WATERMARK is set when the FIFO has filled up to the value
stored in SAMPLES. It is cleared automatically when the FIFO
is read and its content emptied below the value stored in
SAMPLES.
OVERRUN
OVERRUN is set when new data has replaced unread data. The
precise operation of OVERRUN depends on the FIFO mode.
In Bypass Mode, OVERRUN is set when new data replaces
unread data in the DATAX, DATAY, and DATAZ registers. In
all other modes, OVERRUN is set when the FIFO is filled.
OVERRUN is cleared by reading the FIFO contents, and is
automatically cleared when the data is read.
FIFO
The ADXL345 contains a 32 level FIFO that can be used to
minimize host processor intervention. The FIFO has four
modes as described in Table 15 in the Register Definitions
section. Mode selection is made by setting the appropriate
MODE bits in the FIFO_CTL register. Each FIFO mode is
described below.
Bypass Mode
In Bypass Mode the FIFO is not operational and remains empty.
FIFO Mode
In FIFO Mode data from X, Y, and Z measurements go into the
FIFO. When the FIFO is filled to the level specified in
SAMPLES (in the FIFO_CTL register), the WATERMARK
interrupt is set. The FIFO will continue filling until it is full (32
X, Y, and Z samples) and then stop collecting data. After the
FIFO has stopped collecting data the device still continues to
operate, so features like Tap detection, for example, may still be
used once the FIFO is full. The WATERMARK interrupt will
continue to occur until the number of samples in the FIFO is
less than the value of SAMPLES in the FIFO_CTL register.
Stream Mode
In Stream Mode data from X, Y, and Z measurements go into
the FIFO. When the FIFO is filled to the level specified in
SAMPLES (in the FIFO_CTL register), the WATERMARK
interrupt is set. The FIFO will continue filling, and will hold
the latest 32 X, Y, and Z samples, discarding older data as new
data arrives. The WATERMARK interrupt will continue to
occur until the number of samples in the FIFO is less than the
value of SAMPLES in the FIFO_CTL register.
Trigger Mode
In Trigger Mode, the FIFO fills and holds the latest 32 X, Y, and
Z samples. Once a trigger event occurs (as described by the
TRIG_SOURCE bit in the FIFO_CTL register), the FIFO will
keep the last n samples (where n is the value specified by
SAMPLES in the FIFO_CTL register) and then operate in FIFO
mode, collecting new samples only when the FIFO is not full.
Additional trigger events will not be recognized until Trigger
Mode is reset. This can be done by setting the device in Bypass
Mode, reading the FIFO_STATUS register and then setting the
device back into Trigger Mode. The FIFO data should be read
first, as placing the device into Bypass Mode will clear the FIFO.




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