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CS42432-CMZR Arkusz danych(PDF) 45 Page - Cirrus Logic |
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CS42432-CMZR Arkusz danych(HTML) 45 Page - Cirrus Logic |
45 / 58 page DS673F2 45 CS42432 7.9 AOUTX Volume Control (Addresses 08h-0D) 7.9.1 Volume Control (AOUTX_VOL[7:0]) Default = 00h Function: The AOUTx Volume Control registers allow independent setting of the signal levels in 0.5 dB increments from 0 dB to -127.5 dB. Volume settings are decoded as shown in Table 6. The volume changes are im- plemented as dictated by the Soft and Zero Cross bits (DAC_SZC[1:0]). All volume settings less than - 127.5 dB are equivalent to enabling the AOUTx_MUTE bit for the given channel. 7.10 DAC Channel Invert (Address 10h) 7.10.1 Invert Signal Polarity (INV_AOUTX) Default = 0 0 - Disabled 1 - Enabled Function: When enabled, these bits will invert the signal polarity of their respective channels. 7.11 AINX Volume Control (Address 11h-14h) 7.11.1 AINX Volume Control (AINX_VOL[7:0]) Default = 00h Function: The level of AIN1 - AIN6 can be adjusted in 0.5 dB increments as dictated by the ADC Soft and Zero Cross bits (ADC_SZC[1:0]) from +24 to -64 dB. Levels are decoded in two’s complement, as shown in Table 7. 7 6 5 432 10 AOUTx_VOL7 AOUTx_VOL6 AOUTx_VOL5 AOUTx_VOL4 AOUTx_VOL3 AOUTx_VOL2 AOUTx_VOL1 AOUTx_VOL0 Binary Code Volume Setting 00000000 0 dB 00101000 -20 dB 01010000 -40 dB 01111000 -60 dB 10110100 -90 dB Table 6. Example AOUT Volume Settings 7 6 5 432 10 Reserved Reserved INV_AOUT6 INV_AOUT5 INV_AOUT4 INV_AOUT3 INV_AOUT2 INV_AOUT1 7 6 5 432 10 AINx_VOL7 AINx_VOL6 AINx_VOL5 AINx_VOL4 AINx_VOL3 AINx_VOL2 AINx_VOL1 AINx_VOL0 |
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