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CS42432-DMZ Arkusz danych(PDF) 44 Page - Cirrus Logic |
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CS42432-DMZ Arkusz danych(HTML) 44 Page - Cirrus Logic |
44 / 58 page 44 DS673F2 CS42432 Soft Ramp and Zero Cross Enable dictates that signal level changes, either by gain changes, attenuation changes or muting, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will occur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function is inde- pendently monitored and implemented for each channel. 7.7.3 Auto-Mute (AMUTE) Default = 1 0 - Disabled 1 - Enabled Function: The Digital-to-Analog converters of the CS42432 will mute the output following the reception of 8192 con- secutive audio samples of static 0 or -1. A single sample of non-static data will release the mute. Detection and muting is done independently for each channel. The quiescent voltage on the output will be retained during the mute period. The muting function is affected, similar to volume control changes, by the Soft and Zero Cross bits (SZC[1:0]). 7.7.4 Mute ADC Serial Port (MUTE ADC_SP) Default = 0 0 - Disabled 1 - Enabled Function: When enabled, the ADC Serial Port will be muted. 7.8 DAC Channel Mute (Address 07h) 7.8.1 Independent Channel Mute (AOUTX_MUTE) Default = 0 0 - Disabled 1 - Enabled Function: The respective Digital-to-Analog converter outputs of the CS42432 will mute when enabled. The quies- cent voltage on the outputs will be retained. The muting function is affected by the DAC Soft and Zero Cross bits (DAC_SZC[1:0]). 76 543 21 0 Reserved Reserved AOUT6_MUTE AOUT5_MUTE AOUT4_MUTE AOUT3_MUTE AOUT2_MUTE AOUT1_MUTE |
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Podobny opis - CS42432-DMZ |
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