STFLWARP11PG datasheet(6/19 Pages) STMICROELECTRONICS

Numer części	STFLWARP11PG

Szczegółowy opis	WEIGHT ASSOCIATIVE RULE PROCESSOR

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Producent	STMICROELECTRONICS [STMicroelectronics]

Strona internetowa	http://www.st.com

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OTST: For testing purpose only. It must be con-

nected to VSS.

OMTS: For testing purpose only. It must be con-

nected to VSS.

SYNC: W.A.R.P. uses this pin to synchronize input

data from an external database in off-line mode.

The database contains information about antece-

dent and consequent membership functions and

about fuzzy rules. To memorize this database it is

possible to use an host processor or a non volatile

memory.

FUNCTIONAL DESCRIPTION

W.A.R.P. works in two mode depending on the OFL

control signal level:

Off-line MODE (OFL High)

On-line MODE (OFL Low)

OFF-LINE MODE

All W.A.R.P. memories are loaded during the off-

line phase. The membership functions are written

inside their related memories and the process con-

trol rules are loaded inside the program memory.

If the CHM switch has been set low then the

addresses of the words to be written in the memo-

ries are provided by an external bus (A0-A9), while

data must be loaded 8 bit a time in the data bus.

If the CHM switch has been set high then the

addresses of the words to be written in the memo-

ries are internally generated while the addresses

of the EPROM’s locations to be read are directly

Numbers of Input

Data Resolution

Number of Membership Functions

for Term Set

1

128 (7 bit)

16

2

*

128 (7 bit)

8

264 (6 bit)

16

3

64 (6 bit)

2x8 + 1x16

464 (6 bit)

8

* This configuration is not available in W.A.R.P. 1.0.

Table 5.

Available Configurations on a Single Antecedent Memory.

Figure 4. Block Diagram

6/19

W.A.R.P.1.1

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