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LFDW Arkusz danych(PDF) 10 Page - Linear Technology |
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LFDW Arkusz danych(HTML) 10 Page - Linear Technology |
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10 / 24 page  LT3682 10 3682f OPERATION The LT3682 is a constant frequency, current mode step-down regulator. An oscillator, with frequency set by RT, enables an RS flip-flop, turning on the internal power switch. An amplifier and comparator monitor the current flowing between the VIN and SW pins, turning the switch off when this current reaches a level determined by the voltage at VC. An error amplifier measures the output voltage through an external resistor divider tied to the FB pin and servos the VC pin. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the VC pin provides current limit. The VC pin is also clamped to the voltage on the RUN/SS pin; soft-start is implemented by generating a voltage ramp at the RUN/SS pin using an external resistor and capacitor. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the VIN pin, but if the BD pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN/SS pin is used to place the LT3682 in shutdown, disconnecting the output and reducing the input current to less than 1μA. The switch driver operates from either the input or from the BOOST pin. An external capacitor and the internal boost diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for efficient operation. To further optimize efficiency, the LT3682 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 75μA in a typical application. The oscillator reduces the LT3682’s operating frequency when the voltage at the FB pin is low. This frequency foldback helps to control the output current during startup and overload conditions. Internal circuitry monitors the current flowing through the catch diode via the DA pin and delays the generation of new switch pulses if this current is too high (above 1.6A nominal). This mechanism also protects the part during short-circuit and overload conditions by keeping the cur- rent through the inductor under control. The LT3682 contains a power good comparator which trips when the FB pin is at 90% of its regulated value. The PG output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the LT3682 is enabled and VIN is above the minimum input voltage. The LT3682 has an overvoltage protection feature which disables switching action when the VIN goes above 39V typical (36V minimum) during transients. When switching is disabled, the LT3682 can safely sustain transient input voltages up to 60V. |
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