Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

ADSP-2106X Arkusz danych(PDF) 5 Page - Analog Devices

Numer części ADSP-2106X
Szczegółowy opis  DSP Microcomputer Family
Download  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADSP-2106X Arkusz danych(HTML) 5 Page - Analog Devices

  ADSP-2106X Datasheet HTML 1Page - Analog Devices ADSP-2106X Datasheet HTML 2Page - Analog Devices ADSP-2106X Datasheet HTML 3Page - Analog Devices ADSP-2106X Datasheet HTML 4Page - Analog Devices ADSP-2106X Datasheet HTML 5Page - Analog Devices ADSP-2106X Datasheet HTML 6Page - Analog Devices ADSP-2106X Datasheet HTML 7Page - Analog Devices ADSP-2106X Datasheet HTML 8Page - Analog Devices ADSP-2106X Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 47 page
background image
ADSP-21061/ADSP-21061L
–5–
REV. B
Off-Chip Memory and Peripherals Interface
The ADSP-21061’s external port provides the processor’s inter-
face to off-chip memory and peripherals. The 4-gigaword off-
chip address space is included in the ADSP-21061’s unified
address space. The separate on-chip buses—for program
memory, data memory and I/O—are multiplexed at the external
port to create an external system bus with a single 32-bit address
bus and a single 48-bit (or 32-bit) data bus. The on-chip
Super Harvard Architecture provides three-bus performance,
while the off-chip unified address space gives flexibility to the
designer.
Addressing of external memory devices is facilitated by on-chip
decoding of high order address lines to generate memory bank
select signals. Separate control lines are also generated for sim-
plified addressing of page-mode DRAM. The ADSP-21061
provides programmable memory wait states and external memory
acknowledge controls to allow interfacing to DRAM and peripher-
als with variable access, hold and disable time requirements.
Host Processor Interface
The ADSP-21061’s host interface allows easy connection to
standard microprocessor buses, both 16-bit and 32-bit, with
little additional hardware required. Asynchronous transfers at
speeds up to the full clock rate of the processor are supported.
The host interface is accessed through the ADSP-21061’s exter-
nal port and is memory-mapped into the unified address space.
Two channels of DMA are available for the host interface; code
and data transfers are accomplished with low software overhead.
The host processor requests the ADSP-21061’s external bus
with the host bus request (
HBR), host bus grant (HBG) and
ready (REDY) signals. The host can directly read and write the
internal memory of the ADSP-21061, and can access the
DMA channel setup and mailbox registers. Vector interrupt
support is provided for efficient execution of host commands.
DMA Controller
The ADSP-21061’s on-chip DMA controller allows zero-
overhead, nonintrusive data transfers without processor inter-
vention. The DMA controller operates independently and
invisibly to the processor core, allowing DMA operations to
occur while the core is simultaneously executing its program
instructions.
DMA transfers can occur between the ADSP-21061’s internal
memory and either external memory, external peripherals, or a
host processor. DMA transfers can also occur between the
ADSP-21061’s internal memory and its serial ports. DMA
transfers between external memory and external peripheral
devices are another option. External bus packing to 16-, 32-
or 48-bit words is performed during DMA transfers.
Six channels of DMA are available on the ADSP-21061—four
via the serial ports, and two via the processor’s external port (for
either host processor, other ADSP-21061s, memory or I/O
transfers). Programs can be downloaded to the ADSP-21061
using DMA transfers. Asynchronous off-chip peripherals can
control two DMA channels using DMA Request/Grant lines
(
DMAR
1-2, DMAG1-2). Other DMA features include interrupt
generation upon completion of DMA transfers and DMA chain-
ing for automatic linked DMA transfers.
Serial Ports
The ADSP-21061 features two synchronous serial ports that
provide an inexpensive interface to a wide variety of digital and
mixed-signal peripheral devices. The serial ports can operate at
the full clock rate of the processor, providing each with a maxi-
mum data rate of 40 Mbit/s. Independent transmit and receive
functions provide greater flexibility for serial communications.
Serial port data can be automatically transferred to and from
on-chip memory via DMA. Each of the serial ports offers TDM
multichannel mode.
The serial ports can operate with little-endian or big-endian
transmission formats, with word lengths selectable from three
bits to 32 bits. They offer selectable synchronization and trans-
mit modes as well as optional
µ-law or A-law companding.
Serial port clocks and frame syncs can be internally or externally
generated. The serial ports also include keyword and keymask
features to enhance interprocessor communication.
Multiprocessing
The ADSP-21061 offers powerful features tailored to multipro-
cessing DSP systems. The unified address space allows direct
interprocessor accesses of each ADSP-21061’s internal memory.
Distributed bus arbitration logic is included on-chip for simple,
glueless connection of systems containing up to six ADSP-21061s
and a host processor. Master processor changeover incurs only
one cycle of overhead. Bus arbitration is selectable as either
fixed or rotating priority. Bus lock allows indivisible read-modify-
write sequences for semaphores. A vector interrupt is provided
for interprocessor commands. Maximum throughput for inter-
processor data transfer is 500 Mbytes/sec over the external port.
Broadcast writes allow simultaneous transmission of data to
all ADSP-21061s and can be used to implement reflective
semaphores.
Program Booting
The internal memory of the ADSP-21061 can be booted at
system power-up from either an 8-bit EPROM or a host proces-
sor. Selection of the boot source is controlled by the
BMS (Boot
Memory Select), EBOOT (EPROM Boot), and LBOOT (Host
Boot) pins. 32-bit and 16-bit host processors can be used for
booting. See the
BMS pin in the Pin Function Descriptions
section of this data sheet.


Podobny numer części - ADSP-2106X

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
ADSP-21060 AD-ADSP-21060 Datasheet
811Kb / 64P
   High performance signal processor for communications graphics and imaging applications
Rev. F
ADSP-21060 AD-ADSP-21060 Datasheet
949Kb / 64P
   SHARC Processor
Rev. H
ADSP-210602 AD-ADSP-210602 Datasheet
811Kb / 64P
   High performance signal processor for communications graphics and imaging applications
Rev. F
ADSP-21060C AD-ADSP-21060C Datasheet
478Kb / 48P
   ADSP-21060 Industrial SHARC DSP Microcomputer Family
REV. B
ADSP-21060C AD-ADSP-21060C Datasheet
811Kb / 64P
   High performance signal processor for communications graphics and imaging applications
Rev. F
More results

Podobny opis - ADSP-2106X

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
ADSP21062 AD-ADSP21062 Datasheet
338Kb / 48P
   DSP Microcomputer Family
REV. B
ADSP-21060C AD-ADSP-21060C Datasheet
478Kb / 48P
   ADSP-21060 Industrial SHARC DSP Microcomputer Family
REV. B
ADSP-21060LCW-133 AD-ADSP-21060LCW-133 Datasheet
479Kb / 48P
   ADSP-21060 Industrial SHARC DSP Microcomputer Family
REV. B
ADSP-2185L AD-ADSP-2185L Datasheet
223Kb / 31P
   DSP Microcomputer
ADSP-2186M AD-ADSP-2186M Datasheet
288Kb / 40P
   DSP Microcomputer
REV. 0
ADSP-2183 AD-ADSP-2183 Datasheet
252Kb / 31P
   DSP Microcomputer
REV. C
ADSP-2184 AD-ADSP-2184 Datasheet
213Kb / 31P
   DSP Microcomputer
REV. 0
ADSP-2184L AD-ADSP-2184L Datasheet
216Kb / 31P
   DSP Microcomputer
REV. 0
ADSP-2184 AD-ADSP-2184_15 Datasheet
216Kb / 31P
   DSP Microcomputer
REV. 0
ADSP-2185 AD-ADSP-2185_15 Datasheet
291Kb / 32P
   DSP Microcomputer
REV. 0
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com