74ACT11139

DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

SCAS175A – SEPTEMBER 1991 – REVISED APRIL 1996

2

POST OFFICE BOX 655303

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

1G

DMUX

1

15

1A

13

1Y0

16

0

1Y1

1

1

1Y2

2

2

1Y3

3

3

2

14

1B

10

2A

11

2Y0

5

2Y1

6

2Y2

7

2Y3

8

9

2B

2G

G

0

3

logic diagram (positive logic)

1A

1Y3

1Y2

1Y1

1Y0

15

16

1

2

3

1B

14

13

2A

2Y3

2Y2

2Y1

2Y0

10

6

7

8

2B

9

11

5

2G

1G